addx.s

gdb-6.8 Linux下的调试程序 最新版本

	mov.w	#0x505, e0
	set_carry_flag
	addx.w	e0, r0		; Register operand

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 0x0505aaab er0	; add result:
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	
addx_w_reg16_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w rs8,@eRd	; Addx to register indirect
	mov	#word_dest, er0
	mov.w	#0x505, r1
	addx.w	r1, @er0

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 word_dest er0	; er0 still contains address
	test_h_gr32 0xa5a50505 er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.w	#0xf0f, @word_dest
	beq	.Lw3
	fail
.Lw3:

addx_w_reg16_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w rs8,@eRd-	; Addx to register post-decrement
	mov	#word_dest, er0
	mov.w	#0x505, r1
	addx.w	r1, @er0-

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 word_dest-2 er0	; er0 contains address minus one
	test_h_gr32 0xa5a50505  er1	; er1 contains the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.w	#0x1414, @word_dest
	beq	.Lw4
	fail
.Lw4:

addx_w_rsind_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w @eRs,rd8	; Addx from reg indirect to reg
	mov	#word_src, er0
	addx.w	@er0, r1

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 word_src er0	; er0 still contains address
	test_h_gr32 0xa5a5aaaa er1	; er1 contains the sum

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

addx_w_rspostdec_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w @eRs-,rd8	; Addx to register post-decrement
	mov	#word_src, er0
	addx.w	@er0-, r1

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 word_src-2 er0	; er0 contains address minus one
	test_h_gr32 0xa5a5aaaa er1	; er1 contains the sum

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

addx_w_rsind_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w @eRs,rd8	; Addx from reg indirect to reg
	mov	#word_src, er0
	mov	#word_dest, er1
	addx.w	@er0, @er1

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 word_src er0	; er0 still contains src address
	test_h_gr32 word_dest er1	; er1 still contains dst address

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	;; Now check the result of the add to memory.
	cmp.w	#0x1919, @word_dest
	beq	.Lw5
	fail
.Lw5:

addx_w_rspostdec_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.w @eRs-,rd8	; Addx to register post-decrement
	mov	#word_src, er0
	mov	#word_dest, er1
	addx.w	@er0-, @er1-

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 word_src-2 er0	; er0 contains src address minus one
	test_h_gr32 word_dest-2 er1	; er1 contains dst address minus one

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	;; Now check the result of the add to memory.
	cmp.w	#0x1e1e, @word_dest
	beq	.Lw6
	fail
.Lw6:

addx_l_imm32_0:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l #xx:32,Rd	; Addx with carry initially zero.
	addx.l	#0x50505, er0	; Immediate 32-bit operand

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 0xa5aaaaaa er0	; add result:
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	
addx_l_imm32_1:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l #xx:32,Rd	; Addx with carry initially one.
	set_carry_flag
	addx.l	#0x50505, er0	; Immediate 32-bit operand

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 0xa5aaaaab er0	; add result:
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	
addx_l_imm32_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l #xx:32,@eRd	; Addx to register indirect
	mov	#long_dest, er0
	addx.l	#0x50505, @er0

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_dest er0	; er0 still contains address

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.l	#0x50505, @long_dest
	beq	.Ll1
	fail
.Ll1:

addx_l_imm32_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l #xx:32,@eRd-	; Addx to register post-decrement
	mov	#long_dest, er0
	addx.l	#0x50505, @er0-

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_dest-4 er0	; er0 contains address minus one

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.l	#0xa0a0a, @long_dest
	beq	.Ll2
	fail
.Ll2:

addx_l_reg32_0:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l Rs,Rd	; addx with carry initially zero
	mov.l	#0x50505, er0
	addx.l	er0, er1	; Register operand

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 0x50505    er0	; add load
	test_h_gr32 0xa5aaaaaa er1	; add result:
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

addx_l_reg32_1:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l Rs,Rd	; addx with carry initially one
	mov.l	#0x50505, er0
	set_carry_flag
	addx.l	er0, er1	; Register operand

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 0x50505    er0	; add result:
	test_h_gr32 0xa5aaaaab er1	; add result:
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	
addx_l_reg32_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l rs8,@eRd	; Addx to register indirect
	mov	#long_dest, er0
	mov.l	#0x50505, er1
	addx.l	er1, @er0

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_dest er0	; er0 still contains address
	test_h_gr32 0x50505   er1	; er1 has the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.l	#0xf0f0f, @long_dest
	beq	.Ll3
	fail
.Ll3:

addx_l_reg32_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l rs8,@eRd-	; Addx to register post-decrement
	mov	#long_dest, er0
	mov.l	#0x50505, er1
	addx.l	er1, @er0-

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_dest-4 er0	; er0 contains address minus one
	test_h_gr32 0x50505     er1	; er1 contains the test load

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the add to memory.
	cmp.l	#0x141414, @long_dest
	beq	.Ll4
	fail
.Ll4:

addx_l_rsind_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l @eRs,rd8	; Addx from reg indirect to reg
	mov	#long_src, er0
	addx.l	@er0, er1

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 long_src er0	; er0 still contains address
	test_h_gr32 0xa5aaaaaa er1	; er1 contains the sum

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

addx_l_rspostdec_reg32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l @eRs-,rd8	; Addx to register post-decrement
	mov	#long_src, er0
	addx.l	@er0-, er1

	test_carry_clear	; H=0 N=1 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_set

	test_h_gr32 long_src-4 er0	; er0 contains address minus one
	test_h_gr32 0xa5aaaaaa er1	; er1 contains the sum

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

addx_l_rsind_rdind:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l @eRs,rd8	; Addx from reg indirect to reg
	mov	#long_src, er0
	mov	#long_dest, er1
	addx.l	@er0, @er1

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_src er0	; er0 still contains src address
	test_h_gr32 long_dest er1	; er1 still contains dst address

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	;; Now check the result of the add to memory.
	cmp.l	#0x191919, @long_dest
	beq	.Ll5
	fail
.Ll5:

addx_l_rspostdec_rdpostdec:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;;  addx.l @eRs-,rd8	; Addx to register post-decrement
	mov	#long_src, er0
	mov	#long_dest, er1
	addx.l	@er0-, @er1-

	test_carry_clear	; H=0 N=0 Z=0 V=0 C=0
	test_ovf_clear
	test_zero_clear
	test_neg_clear

	test_h_gr32 long_src-4 er0	; er0 contains src address minus one
	test_h_gr32 long_dest-4 er1	; er1 contains dst address minus one

	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
	;; Now check the result of the add to memory.
	cmp.l	#0x1e1e1e, @long_dest
	beq	.Ll6
	fail
.Ll6:
.endif
	pass

	exit 0