📄 smass.cgs
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# frv testcase for smass $GRi,$GRj# mach: fr405 fr450 .include "../testutils.inc" start .global smasssmass1: ; Positive operands set_gr_immed 3,gr7 ; multiply small numbers set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 3,gr7 test_gr_immed 2,gr8 test_spr_immed 7,iacc0l ; result 3*2+1 test_spr_immed 0,iacc0hsmass2: set_gr_immed 1,gr7 ; multiply by 1 set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 1,gr7 test_gr_immed 2,gr8 test_spr_immed 3,iacc0l ; result 1*2+1 test_spr_immed 0,iacc0hsmass3: set_gr_immed 2,gr7 ; multiply by 1 set_gr_immed 1,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 1,gr8 test_gr_immed 2,gr7 test_spr_immed 3,iacc0l ; result 2*1+1 test_spr_immed 0,iacc0hsmass4: set_gr_immed 0,gr7 ; multiply by 0 set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 2,gr8 test_gr_immed 0,gr7 test_spr_immed 1,iacc0l ; result 0*2+1 test_spr_immed 0,iacc0hsmass5: set_gr_immed 2,gr7 ; multiply by 0 set_gr_immed 0,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 0,gr8 test_gr_immed 2,gr7 test_spr_immed 1,iacc0l ; result 2*0+1 test_spr_immed 0,iacc0hsmass6: set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 2,gr8 test_gr_limmed 0x3fff,0xffff,gr7 test_spr_limmed 0x7fff,0xffff,iacc0l ; 3fffffff*2+1 test_spr_immed 0,iacc0hsmass7: set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 2,gr8 test_gr_limmed 0x4000,0x0000,gr7 test_spr_limmed 0x8000,0x0001,iacc0l ; 40000000*2+1 test_spr_immed 0,iacc0hsmass8: set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result set_gr_immed 4,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 4,gr8 test_gr_limmed 0x4000,0x0000,gr7 test_spr_immed 1,iacc0l ; 40000000*4+1 test_spr_immed 1,iacc0hsmass9: set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result set_gr_limmed 0x7fff,0xffff,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_limmed 0x7fff,0xffff,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_immed 0x00000002,iacc0l ; 7fffffff*7fffffff+1 test_spr_limmed 0x3fff,0xffff,iacc0hsmass10: ; Mixed operands set_gr_immed -3,gr7 ; multiply small numbers set_gr_immed 2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 2,gr8 test_gr_immed -3,gr7 test_spr_immed -5,iacc0l ; -3*2+1 test_spr_immed -1,iacc0hsmass11: set_gr_immed 3,gr7 ; multiply small numbers set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_immed 3,gr7 test_spr_immed -5,iacc0l ; 3*-2+1 test_spr_immed -1,iacc0hsmass12: set_gr_immed 1,gr7 ; multiply by 1 set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_immed 1,gr7 test_spr_immed -1,iacc0l ; 1*-2+1 test_spr_immed -1,iacc0hsmass13: set_gr_immed -2,gr7 ; multiply by 1 set_gr_immed 1,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 1,gr8 test_gr_immed -2,gr7 test_spr_immed -1,iacc0l ; -2*1+1 test_spr_immed -1,iacc0hsmass14: set_gr_immed 0,gr7 ; multiply by 0 set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_immed 0,gr7 test_spr_immed 1,iacc0l ; 0*-2+1 test_spr_immed 0,iacc0hsmass15: set_gr_immed -2,gr7 ; multiply by 0 set_gr_immed 0,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed 0,gr8 test_gr_immed -2,gr7 test_spr_immed 1,iacc0l ; -2*0+1 test_spr_immed 0,iacc0hsmass16: set_gr_limmed 0x2000,0x0001,gr7 ; 31 bit result set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_limmed 0x2000,0x0001,gr7 test_spr_limmed 0xbfff,0xffff,iacc0l ; 20000001*-2+1 test_spr_limmed 0xffff,0xffff,iacc0hsmass17: set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_limmed 0x4000,0x0000,gr7 test_spr_limmed 0x8000,0x0001,iacc0l ; 40000000*-2+1 test_spr_limmed 0xffff,0xffff,iacc0hsmass18: set_gr_limmed 0x4000,0x0001,gr7 ; 32 bit result set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_limmed 0x4000,0x0001,gr7 test_spr_limmed 0x7fff,0xffff,iacc0l ; 40000001*-2+1 test_spr_limmed 0xffff,0xffff,iacc0hsmass19: set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result set_gr_immed -4,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -4,gr8 test_gr_limmed 0x4000,0x0000,gr7 test_spr_limmed 0x0000,0x0001,iacc0l ; 40000000*-4+1 test_spr_limmed 0xffff,0xffff,iacc0hsmass20: set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result set_gr_limmed 0x8000,0x0000,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_limmed 0x8000,0x0000,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0x8000,0x0001,iacc0l ; 7fffffff*80000000+1 test_spr_limmed 0xc000,0x0000,iacc0hsmass21: ; Negative operands set_gr_immed -3,gr7 ; multiply small numbers set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_immed -3,gr7 test_spr_immed 7,iacc0l ; -3*-2+1 test_spr_immed 0,iacc0hsmass22: set_gr_immed -1,gr7 ; multiply by 1 set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_immed -1,gr7 test_spr_immed 3,iacc0l ; -1*-2+1 test_spr_immed 0,iacc0hsmass23: set_gr_immed -2,gr7 ; multiply by 1 set_gr_immed -1,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -1,gr8 test_gr_immed -2,gr7 test_spr_immed 3,iacc0l ; -2*-1+1 test_spr_immed 0,iacc0hsmass24: set_gr_limmed 0xc000,0x0001,gr7 ; 31 bit result set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_limmed 0xc000,0x0001,gr7 test_spr_limmed 0x7fff,0xffff,iacc0l ; c0000001*-2+1 test_spr_immed 0,iacc0hsmass25: set_gr_limmed 0xc000,0x0000,gr7 ; 32 bit result set_gr_immed -2,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -2,gr8 test_gr_limmed 0xc000,0x0000,gr7 test_spr_limmed 0x8000,0x0001,iacc0l ; c0000000*-2+1 test_spr_immed 0,iacc0hsmass26: set_gr_limmed 0xc000,0x0000,gr7 ; 33 bit result set_gr_immed -4,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_immed -4,gr8 test_gr_limmed 0xc000,0x0000,gr7 test_spr_immed 0x00000001,iacc0l ; c0000000*-4+1 test_spr_immed 1,iacc0hsmass27: set_gr_limmed 0x8000,0x0001,gr7 ; almost max positive result set_gr_limmed 0x8000,0x0001,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_limmed 0x8000,0x0001,gr8 test_gr_limmed 0x8000,0x0001,gr7 test_spr_immed 0x00000002,iacc0l ; 80000001*80000001+1 test_spr_limmed 0x3fff,0xffff,iacc0hsmass28: set_gr_limmed 0x8000,0x0000,gr7 ; max positive result set_gr_limmed 0x8000,0x0000,gr8 set_spr_immed 0,iacc0h set_spr_immed 1,iacc0l smass gr7,gr8 test_gr_limmed 0x8000,0x0000,gr8 test_gr_limmed 0x8000,0x0000,gr7 test_spr_immed 0x00000001,iacc0l ; 80000000*80000000+1 test_spr_limmed 0x4000,0x0000,iacc0hsmass29: set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (pos) set_gr_limmed 0x7fff,0xffff,gr8 set_spr_limmed 0xffff,0xfffe,iacc0l set_spr_limmed 0x4000,0x0000,iacc0h smass gr7,gr8 test_gr_limmed 0x7fff,0xffff,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x7fff,0xffff,iacc0h ; 40000000fffffffesmass30: set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (pos) set_gr_limmed 0x7fff,0xffff,gr8 set_spr_limmed 0xffff,0xffff,iacc0l set_spr_limmed 0x4000,0x0000,iacc0h smass gr7,gr8 test_gr_limmed 0x7fff,0xffff,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x7fff,0xffff,iacc0h ; 40000000ffffffffsmass31: set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (pos) set_gr_limmed 0x7fff,0xffff,gr8 set_spr_limmed 0xffff,0xffff,iacc0l set_spr_limmed 0x7fff,0xffff,iacc0h smass gr7,gr8 test_gr_limmed 0x7fff,0xffff,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0xffff,0xffff,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x7fff,0xffff,iacc0h ; 7fffffffffffffffsmass32: set_gr_limmed 0x7fff,0xffff,gr7 ; not quite overflow (neg) set_gr_limmed 0x8000,0x0000,gr8 set_spr_limmed 0x8000,0x0000,iacc0l set_spr_limmed 0xbfff,0xffff,iacc0h smass gr7,gr8 test_gr_limmed 0x8000,0x0000,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff80000000smass33: set_gr_limmed 0x7fff,0xffff,gr7 ; just barely overflow (neg) set_gr_limmed 0x8000,0x0000,gr8 set_spr_limmed 0x7fff,0xffff,iacc0l set_spr_limmed 0xbfff,0xffff,iacc0h smass gr7,gr8 test_gr_limmed 0x8000,0x0000,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x8000,0x0000,iacc0h ; bfffffff7fffffffsmass34: set_gr_limmed 0x7fff,0xffff,gr7 ; maximum overflow (neg) set_gr_limmed 0x8000,0x0000,gr8 set_spr_limmed 0x0000,0x0000,iacc0l set_spr_limmed 0x8000,0x0000,iacc0h smass gr7,gr8 test_gr_limmed 0x8000,0x0000,gr8 test_gr_limmed 0x7fff,0xffff,gr7 test_spr_limmed 0x0000,0x0000,iacc0l ; 7fffffff*7fffffff+ test_spr_limmed 0x8000,0x0000,iacc0h ; 8000000000000000 pass⌨️ 快捷键说明
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