fcmpd.cgs

来自「gdb-6.8 Linux下的调试程序最新版本」· CGS 代码 · 共 602 行 · 第 1/2 页
CGS
602 行
	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr20,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr0,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr4,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr8,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr12,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr16,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr24,fr20,fcc0	test_fcc	0x2,0	set_fcc         0x7,0		; Set mask opposite of expected	fcmpd      	fr24,fr24,fcc0	test_fcc	0x8,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr28,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr32,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr36,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr40,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr44,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr48,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr24,fr52,fcc0	test_fcc	0x4,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr24,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr24,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr0,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr4,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr8,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr12,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr16,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr20,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr28,fr24,fcc0	test_fcc	0x2,0	set_fcc         0x7,0		; Set mask opposite of expected	fcmpd      	fr28,fr28,fcc0	test_fcc	0x8,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr32,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr36,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr40,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr44,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr48,fcc0	test_fcc	0x4,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr28,fr52,fcc0	test_fcc	0x4,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr28,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr28,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr0,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr4,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr8,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr12,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr16,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr20,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr24,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr28,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr32,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr36,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr40,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr48,fr44,fcc0	test_fcc	0x2,0	set_fcc         0x7,0		; Set mask opposite of expected	fcmpd      	fr48,fr48,fcc0	test_fcc	0x8,0	set_fcc         0xb,0		; Set mask opposite of expected	fcmpd      	fr48,fr52,fcc0	test_fcc	0x4,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr48,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr48,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr0,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr4,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr8,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr12,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr16,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr20,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr24,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr28,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr32,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr36,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr40,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr44,fcc0	test_fcc	0x2,0	set_fcc         0xd,0		; Set mask opposite of expected	fcmpd      	fr52,fr48,fcc0	test_fcc	0x2,0	set_fcc         0x7,0		; Set mask opposite of expected	fcmpd      	fr52,fr52,fcc0	test_fcc	0x8,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr52,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr52,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr0,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr4,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr8,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr12,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr16,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr20,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr24,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr28,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr32,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr36,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr40,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr44,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr48,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr52,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr56,fr60,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr0,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr4,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr8,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr12,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr16,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr20,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr24,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr28,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr32,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr36,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr40,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr44,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr48,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr52,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr56,fcc0	test_fcc	0x1,0	set_fcc         0xe,0		; Set mask opposite of expected	fcmpd      	fr60,fr60,fcc0	test_fcc	0x1,0	pass
fcmpd.cgs - 源码说明

本页面展示了「gdb-6.8 Linux下的调试程序最新版本」中的 fcmpd.cgs 源码文件，采用 CGS 编程语言编写，共 602 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。
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