📄 nfdsubs.cgs
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# frv testcase for nfdsubs $FRi,$FRj,$FRk# mach: fr500 fr550 frv .include "testutils.inc" float_constants start load_float_constants load_float_constants1 .global nfdsubsnfdsubs: nfdsubs fr0,fr16,fr2 test_fr_fr fr2,fr0 test_fr_fr fr3,fr0 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr4,fr16,fr2 test_fr_fr fr2,fr4 test_fr_fr fr3,fr4 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr8,fr16,fr2 test_fr_fr fr2,fr8 test_fr_fr fr3,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr12,fr16,fr2 test_fr_fr fr2,fr12 test_fr_fr fr3,fr12 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr16,fr16,fr2 test_fr_fr fr2,fr16 test_fr_fr fr2,fr20 test_fr_fr fr3,fr16 test_fr_fr fr3,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr20,fr16,fr2 test_fr_fr fr2,fr16 test_fr_fr fr2,fr20 test_fr_fr fr3,fr16 test_fr_fr fr3,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr24,fr16,fr2 test_fr_fr fr2,fr24 test_fr_fr fr3,fr24 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr28,fr16,fr2 test_fr_fr fr2,fr28 test_fr_fr fr3,fr28 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr32,fr16,fr2 test_fr_fr fr2,fr32 test_fr_fr fr3,fr32 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr36,fr16,fr2 test_fr_fr fr2,fr36 test_fr_fr fr3,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr40,fr16,fr2 test_fr_fr fr2,fr40 test_fr_fr fr3,fr40 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr44,fr16,fr2 test_fr_fr fr2,fr44 test_fr_fr fr3,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr48,fr16,fr2 test_fr_fr fr2,fr48 test_fr_fr fr3,fr48 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr52,fr16,fr2 test_fr_fr fr2,fr52 test_fr_fr fr3,fr52 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr0,fr20,fr2 test_fr_fr fr2,fr0 test_fr_fr fr3,fr0 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr4,fr20,fr2 test_fr_fr fr2,fr4 test_fr_fr fr3,fr4 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr8,fr20,fr2 test_fr_fr fr2,fr8 test_fr_fr fr3,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr12,fr20,fr2 test_fr_fr fr2,fr12 test_fr_fr fr3,fr12 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr16,fr20,fr2 test_fr_fr fr2,fr16 test_fr_fr fr2,fr20 test_fr_fr fr3,fr16 test_fr_fr fr3,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr20,fr20,fr2 test_fr_fr fr2,fr16 test_fr_fr fr2,fr20 test_fr_fr fr3,fr16 test_fr_fr fr3,fr20 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr24,fr20,fr2 test_fr_fr fr2,fr24 test_fr_fr fr3,fr24 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr28,fr20,fr2 test_fr_fr fr2,fr28 test_fr_fr fr3,fr28 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr32,fr20,fr2 test_fr_fr fr2,fr32 test_fr_fr fr3,fr32 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr36,fr20,fr2 test_fr_fr fr2,fr36 test_fr_fr fr3,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr40,fr20,fr2 test_fr_fr fr2,fr40 test_fr_fr fr3,fr40 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr44,fr20,fr2 test_fr_fr fr2,fr44 test_fr_fr fr3,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr48,fr20,fr2 test_fr_fr fr2,fr48 test_fr_fr fr3,fr48 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr52,fr20,fr2 test_fr_fr fr2,fr52 test_fr_fr fr3,fr52 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr32,fr36,fr2 test_fr_fr fr2,fr8 test_fr_fr fr3,fr8 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr44,fr40,fr2 test_fr_fr fr2,fr36 test_fr_fr fr3,fr36 test_spr_immed 0,fner1 test_spr_immed 0,fner0 ; try to cause exceptions nfdsubs fr4,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr0,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr56,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44 test_spr_immed 0,fner1 test_spr_immed 0,fner0 nfdsubs fr60,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44 test_spr_immed 0xc,fner1 test_spr_immed 0,fner0 pass⌨️ 快捷键说明
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