📄 2410lib.txt
字号:
; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 919] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\SDRAM\2410lib.o --depend=.\SDRAM\2410lib.d --device=DARMSS9 --apcs=interwork -O0 -I..\Common\Inc -I.\Include -IC:\Keil\ARM\INC\Samsung --omf_browse=.\SDRAM\2410lib.crf ..\common\src\2410lib.c]
ARM
AREA ||.text||, CODE, READONLY, ALIGN=2
port_init PROC
;;;50 //Binary : *0 1 1 1, 1 1 1 1, 1 1 1 1
;;;51 rGPACON = 0x5fbfff;
000000 e59f03a0 LDR r0,|L1.936|
000004 e3a01456 MOV r1,#0x56000000
000008 e5810000 STR r0,[r1,#0]
;;;52
;;;53 //===* PORT B GROUP
;;;54 //Ports : GPB10 GPB9 GPB8 GPB7 GPB6 GPB5 GPB4 GPB3 GPB2 GPB1 GPB0
;;;55 //Signal : GPB10 GPB9 GPB8 GPB7 GPB6 DIS_OFF L3CLOCK L3DATA L3MODE PWM2 PWM1
;;;56 //Setting: Output Output Output Output Output Output Output Output Output TOUT1 TOUT0
;;;57 //Binary : 01, 01 *01, *01 *01, 01 01, 01 01, 10 10
;;;58 rGPBCON = 0x155559;
00000c e59f0398 LDR r0,|L1.940|
000010 e5810010 STR r0,[r1,#0x10]
;;;59 rGPBUP = 0x7ff; // The pull up function is disabled GPB[10:0]
000014 e59f0394 LDR r0,|L1.944|
000018 e5810018 STR r0,[r1,#0x18]
;;;60
;;;61 //=== PORT C GROUP
;;;62 //Ports : GPC15 GPC14 GPC13 GPC12 GPC11 GPC10 GPC9 GPC8 GPC7 GPC6 GPC5 GPC4 GPC3 GPC2 GPC1 GPC0
;;;63 //Signal : VD7 VD6 VD5 VD4 VD3 VD2 VD1 VD0 Output Output Output OUT VFRAME VLINE VCLK LEND
;;;64 //Binary : 10 10, 10 10, 10 10, 10 10, *01 *01, *01 01, 10 10, 10 10
;;;65 rGPCCON = 0xaaaa55aa;
00001c e59f0390 LDR r0,|L1.948|
000020 e5810020 STR r0,[r1,#0x20]
;;;66 rGPCUP = 0xffff; // The pull up function is disabled GPC[15:0]
000024 e0200460 EOR r0,r0,r0,ROR #8
000028 e5810028 STR r0,[r1,#0x28]
;;;67
;;;68 //=== PORT D GROUP
;;;69 //Ports : GPD15 GPD14 GPD13 GPD12 GPD11 GPD10 GPD9 GPD8 GPD7 GPD6 GPD5 GPD4 GPD3 GPD2 GPD1 GPD0
;;;70 //Signal : VD23 VD22 VD21 VD20 VD19 VD18 VD17 VD16 VD15 VD14 VD13 VD12 VD11 VD10 VD9 VD8
;;;71 //Binary : 10 10, 10 10, 10 10, 10 10, 10 10, 10 10, 10 10, 10 10
;;;72 rGPDCON = 0xaaaaaaaa;
00002c e59f0384 LDR r0,|L1.952|
000030 e5810030 STR r0,[r1,#0x30]
;;;73 rGPDUP = 0xffff; // The pull up function is disabled GPD[15:0]
000034 e59f0380 LDR r0,|L1.956|
000038 e5810038 STR r0,[r1,#0x38]
;;;74
;;;75 //=== PORT E GROUP
;;;76 //Ports : GPE15 GPE14 GPE13 GPE12 GPE11 GPE10 GPE9 GPE8 GPE7 GPE6 GPE5 GPE4
;;;77 //Signal : IICSDA IICSCL SPICLK SPIMOSI SPIMISO SDDATA3 SDDATA2 SDDATA1 SDDATA0 SDCMD SDCLK I2SSDO
;;;78 //Binary : 10 10, 10 10, 10 10, 10 10, 10 10, 10 10,
;;;79 //----------------------------------------------------------------------------------------
;;;80 //Ports : GPE3 GPE2 GPE1 GPE0
;;;81 //Signal : I2SSDI CDCLK I2SSCLK I2SLRCK
;;;82 //Binary : 10 10, 10 10
;;;83 rGPECON = 0xa6aaaaaa;
00003c e59f037c LDR r0,|L1.960|
000040 e5810040 STR r0,[r1,#0x40]
;;;84 rGPEUP = 0xffff; // The pull up function is disabled GPE[15:0]
000044 e59f0370 LDR r0,|L1.956|
000048 e5810048 STR r0,[r1,#0x48]
;;;85 rGPEDAT = 0x2000;
00004c e3a00a02 MOV r0,#0x2000
000050 e5810044 STR r0,[r1,#0x44]
;;;86 //=== PORT F GROUP
;;;87 //Ports : GPF7 GPF6 GPF5 GPF4 GPF3 GPF2 GPF1 GPF0
;;;88 //Signal : LED_4 LED_3 LED_2 LED_1 PS2_INT CPLD_INT1 KEY_INT BUT_INT1
;;;89 //Setting: Output Output Output Output EINT3 EINT2 EINT1 EINT0
;;;90 //Binary : 01 01, 01 01, 10 10, 10 10
;;;91 rGPFCON = 0x55aa;
000054 e59f0368 LDR r0,|L1.964|
000058 e5810050 STR r0,[r1,#0x50]
;;;92 rGPFUP = 0xff; // The pull up function is disabled GPF[7:0]
00005c e3a000ff MOV r0,#0xff
000060 e5810058 STR r0,[r1,#0x58]
;;;93
;;;94 //=== PORT G GROUP
;;;95 //Ports : GPG15 GPG14 GPG13 GPG12 GPG11 GPG10 GPG9 GPG8 GPG7 GPG6
;;;96 //Signal : nYPON YMON nXPON XMON GPG11 SD_CD CPLD_INT3 CPLD_INT2 SPICLK1 SPIMOSI
;;;97 //Setting: nYPON YMON nXPON XMON Output Iutput EINT17 EINT17 SPICLK1 SPIMOSI1
;;;98 //Binary : 11 11, 11 11, 01 00, 10 10, 11 11
;;;99 //---------------------------------------------------------------------------------------
;;;100 //Ports : GPG5 GPG4 GPG3 GPG2 GPG1 GPG0
;;;101 //Signal : SPIMISO1 LCD_PWREN BUT_INT2 nSS0 NET_INT GPG0
;;;102 //Setting: SPIMISO1 LCD_PWRDN EINT11 nSS0 EINT9 Output
;;;103 //Binary : 11 11, 10 11, 10 *01
;;;104 rGPGCON = 0xff4af7b9;
000064 e59f035c LDR r0,|L1.968|
000068 e5810060 STR r0,[r1,#0x60]
;;;105 rGPGUP = 0xffff; // The pull up function is disabled GPG[15:0]
00006c e59f0348 LDR r0,|L1.956|
000070 e5810068 STR r0,[r1,#0x68]
;;;106
;;;107 //rGPGCON = (rGPGCON & 0xfffffcff) | (1<<8); // GPG4 [9:8] 11 -> LCD_PWREN Enable
;;;108 // Eable LCD
;;;109 // rGPGDAT = (rGPGDAT & 0xffef) | (1<<4);
;;;110 // close LCD
;;;111 rGPGDAT = rGPGDAT & 0xffcf;
000074 e3a00456 MOV r0,#0x56000000
000078 e5900064 LDR r0,[r0,#0x64]
00007c e59f1348 LDR r1,|L1.972|
000080 e0000001 AND r0,r0,r1
000084 e3a01456 MOV r1,#0x56000000
000088 e5810064 STR r0,[r1,#0x64]
;;;112
;;;113 //=== PORT H GROUP
;;;114 //Ports : GPH10 GPH9 GPH8 GPH7 GPH6 GPH5 GPH4 GPH3 GPH2 GPH1 GPH0
;;;115 //Signal : GPH10 CLKOUT0 SD_WP CTS1 RTS1 RXD1 TXD1 RXD0 TXD0 nRTS0 nCTS0
;;;116 //Setting: Output CLKOUT0 GPH8 nCTS1 nRTS1 RXD1 TXD1 RXD0 TXD0 nRTS0 nCTS0
;;;117 //Binary : 10, 10 10, 11 11, 10 10, 10 10, 10 10
;;;118 rGPHCON = 0x2aaaaa;
00008c e59f033c LDR r0,|L1.976|
000090 e5810070 STR r0,[r1,#0x70]
;;;119 rGPHUP = 0x7ff; // The pull up function is disabled GPH[10:0]
000094 e59f0314 LDR r0,|L1.944|
000098 e5810078 STR r0,[r1,#0x78]
;;;120
;;;121 }
00009c e12fff1e BX lr
;;;122
ENDP
uart_change_baud PROC
;;;132 void uart_change_baud(int nChannel, int nBaud)
;;;133 {
0000a0 e92d4030 PUSH {r4,r5,lr}
0000a4 e24dd01c SUB sp,sp,#0x1c
0000a8 e1a04000 MOV r4,r0
0000ac e1a05001 MOV r5,r1
;;;134 if (nChannel == UART0)
0000b0 e3540000 CMP r4,#0
0000b4 1a000013 BNE |L1.264|
;;;135 rUBRDIV0=( (int)(PCLK/16./nBaud + 0.5) -1 );
0000b8 e1a00005 MOV r0,r5
0000bc ebfffffe BL __aeabi_i2d
0000c0 e58d0010 STR r0,[sp,#0x10]
0000c4 e58d1014 STR r1,[sp,#0x14]
0000c8 e1a03001 MOV r3,r1
0000cc e1a02000 MOV r2,r0
0000d0 e28f0fbf ADR r0,|L1.980|
0000d4 e8900003 LDM r0,{r0,r1}
0000d8 ebfffffe BL __aeabi_ddiv
0000dc e58d0008 STR r0,[sp,#8]
0000e0 e58d100c STR r1,[sp,#0xc]
0000e4 e28f0e2f ADR r0,|L1.988|
0000e8 e890000c LDM r0,{r2,r3}
0000ec e59d0008 LDR r0,[sp,#8]
0000f0 ebfffffe BL __aeabi_dadd
0000f4 e88d0003 STM sp,{r0,r1}
0000f8 ebfffffe BL __aeabi_d2iz
0000fc e2400001 SUB r0,r0,#1
000100 e3a01205 MOV r1,#0x50000000
000104 e5810028 STR r0,[r1,#0x28]
|L1.264|
;;;136
;;;137 if (nChannel == UART1)
000108 e3540001 CMP r4,#1
00010c 1a00000e BNE |L1.332|
;;;138 rUBRDIV1=( (int)(PCLK/16./nBaud) -1 );
000110 e1a00005 MOV r0,r5
000114 ebfffffe BL __aeabi_i2d
000118 e58d0010 STR r0,[sp,#0x10]
00011c e58d1014 STR r1,[sp,#0x14]
000120 e1a03001 MOV r3,r1
000124 e1a02000 MOV r2,r0
000128 e28f0fa9 ADR r0,|L1.980|
00012c e8900003 LDM r0,{r0,r1}
000130 ebfffffe BL __aeabi_ddiv
000134 e58d0008 STR r0,[sp,#8]
000138 e58d100c STR r1,[sp,#0xc]
00013c ebfffffe BL __aeabi_d2iz
000140 e2400001 SUB r0,r0,#1
000144 e59f1298 LDR r1,|L1.996|
000148 e5810028 STR r0,[r1,#0x28]
|L1.332|
;;;139
;;;140 if (nChannel == UART2)
00014c e35400bb CMP r4,#0xbb
000150 1a00000e BNE |L1.400|
;;;141 rUBRDIV2=( (int)(PCLK/16./nBaud) -1 );
000154 e1a00005 MOV r0,r5
000158 ebfffffe BL __aeabi_i2d
00015c e58d0010 STR r0,[sp,#0x10]
000160 e58d1014 STR r1,[sp,#0x14]
000164 e1a03001 MOV r3,r1
000168 e1a02000 MOV r2,r0
00016c e28f0e26 ADR r0,|L1.980|
000170 e8900003 LDM r0,{r0,r1}
000174 ebfffffe BL __aeabi_ddiv
000178 e58d0008 STR r0,[sp,#8]
00017c e58d100c STR r1,[sp,#0xc]
000180 ebfffffe BL __aeabi_d2iz
000184 e2400001 SUB r0,r0,#1
000188 e59f1258 LDR r1,|L1.1000|
00018c e5810028 STR r0,[r1,#0x28]
|L1.400|
;;;142 }
000190 e28dd01c ADD sp,sp,#0x1c
000194 e8bd4030 POP {r4,r5,lr}
000198 e12fff1e BX lr
;;;143
ENDP
delay PROC
;;;562 void delay(int nTime)
;;;563 {
00019c e92d4070 PUSH {r4-r6,lr}
0001a0 e1a04000 MOV r4,r0
;;;564 // time=0: adjust the Delay function by WatchDog timer.
;;;565 // time>0: the number of loop time
;;;566 // resolution of time is 100us.
;;;567 int i,adjust=0;
0001a4 e3a06000 MOV r6,#0
;;;568 if(nTime==0)
0001a8 e3540000 CMP r4,#0
0001ac 1a00000c BNE |L1.484|
;;;569 {
;;;570 nTime = 200;
0001b0 e3a040c8 MOV r4,#0xc8
;;;571 adjust = 1;
0001b4 e3a06001 MOV r6,#1
;;;572 delayLoopCount = 400;
0001b8 e3a00e19 MOV r0,#0x190
0001bc e59f1228 LDR r1,|L1.1004|
0001c0 e5810000 STR r0,[r1,#0] ; delayLoopCount
;;;573 //PCLK/1M,Watch-dog disable,1/64,interrupt disable,reset disable
;;;574 rWTCON = ((PCLK/1000000-1)<<8)|(2<<3);
0001c4 e2800dbe ADD r0,r0,#0x2f80
0001c8 e3a01453 MOV r1,#0x53000000
0001cc e5810000 STR r0,[r1,#0]
;;;575 rWTDAT = 0xffff; //for first update
0001d0 e0660806 RSB r0,r6,r6,LSL #16
0001d4 e5810004 STR r0,[r1,#4]
;;;576 rWTCNT = 0xffff; //resolution=64us @any PCLK
0001d8 e5810008 STR r0,[r1,#8]
;;;577 rWTCON = ((PCLK/1000000-1)<<8)|(2<<3)|(1<<5); //Watch-dog timer start
0001dc e59f020c LDR r0,|L1.1008|
0001e0 e5810000 STR r0,[r1,#0]
|L1.484|
;;;578 }
;;;579 for(;nTime>0;nTime--)
0001e4 ea000007 B |L1.520|
|L1.488|
;;;580 for(i=0;i<delayLoopCount;i++);
0001e8 e3a05000 MOV r5,#0
0001ec ea000000 B |L1.500|
|L1.496|
0001f0 e2855001 ADD r5,r5,#1
|L1.500|
0001f4 e59f01f0 LDR r0,|L1.1004|
0001f8 e5900000 LDR r0,[r0,#0] ; delayLoopCount
0001fc e1550000 CMP r5,r0
000200 bafffffa BLT |L1.496|
000204 e2444001 SUB r4,r4,#1 ;579
|L1.520|
000208 e3540000 CMP r4,#0 ;579
00020c cafffff5 BGT |L1.488|
;;;581 if(adjust==1)
000210 e3560001 CMP r6,#1
000214 1a00000b BNE |L1.584|
;;;582 {
;;;583 rWTCON = ((PCLK/1000000-1)<<8)|(2<<3); //Watch-dog timer stop
000218 e59f01d4 LDR r0,|L1.1012|
00021c e3a01453 MOV r1,#0x53000000
000220 e5810000 STR r0,[r1,#0]
;;;584 i = 0xffff - rWTCNT; //1count->64us, 200*400 cycle runtime = 64*i us
000224 e3a00453 MOV r0,#0x53000000
000228 e5900008 LDR r0,[r0,#8]
00022c e59f1188 LDR r1,|L1.956|
000230 e0415000 SUB r5,r1,r0
;;;585 delayLoopCount = 8000000/(i*64); //200*400:64*i=1*x:100 -> x=80000*100/(64*i)
000234 e1a01305 LSL r1,r5,#6
000238 e59f01b8 LDR r0,|L1.1016|
00023c ebfffffe BL __aeabi_idivmod
000240 e59f11a4 LDR r1,|L1.1004|
000244 e5810000 STR r0,[r1,#0] ; delayLoopCount
|L1.584|
;;;586 }
;;;587 }
000248 e8bd4070 POP {r4-r6,lr}
00024c e12fff1e BX lr
;;;588
ENDP
uart_init PROC
;;;154 void uart_init(int nMainClk, int nBaud, int nChannel)
;;;155 {
000250 e92d40f0 PUSH {r4-r7,lr}
000254 e24dd02c SUB sp,sp,#0x2c
000258 e1a04000 MOV r4,r0
00025c e1a05001 MOV r5,r1
000260 e1a06002 MOV r6,r2
;;;156 int i;
;;;157
;;;158 if(nMainClk == 0)
000264 e3540000 CMP r4,#0
000268 1a000000 BNE |L1.624|
;;;159 nMainClk = PCLK;
00026c e59f4188 LDR r4,|L1.1020|
|L1.624|
;;;160
;;;161 switch (nChannel)
000270 e3560000 CMP r6,#0
000274 0a000004 BEQ |L1.652|
000278 e3560001 CMP r6,#1
00027c 0a000028 BEQ |L1.804|
000280 e35600bb CMP r6,#0xbb
000284 1a000080 BNE |L1.1164|
000288 ea00005f B |L1.1036|
|L1.652|
;;;162 {
;;;163 case UART0:
00028c e1a00000 MOV r0,r0
;;;164 rUFCON0 = 0x0; //UART channel 0 FIFO control register, FIFO disable
000290 e3a00000 MOV r0,#0
000294 e3a01205 MOV r1,#0x50000000
000298 e5810008 STR r0,[r1,#8]
;;;165 rUMCON0 = 0x0; //UART chaneel 0 MODEM control register, AFC disable
00029c e581000c STR r0,[r1,#0xc]
;;;166 rULCON0 = 0x3; //Line control register : Normal,No parity,1 stop,8 bits
0002a0 e3a00003 MOV r0,#3
0002a4 e5810000 STR r0,[r1,#0]
;;;167 // [10] [9] [8] [7] [6] [5] [4] [3:2] [1:0]
;;;168 // Clock Sel, Tx Int, Rx Int, Rx Time Out, Rx err, Loop-back, Send break, Transmit Mode, Receive Mode
;;;169 // 0 1 0, 0 1 0 0, 01 01
;;;170 // PCLK Level Pulse Disable Generate Normal Normal Interrupt or Polling
;;;171 rUCON0 = 0x245; // Control register
0002a8 e59f0150 LDR r0,|L1.1024|
0002ac e5810004 STR r0,[r1,#4]
;;;172 // rUBRDIV0=( (int)(nMainClk/16./nBaud) -1 ); // Baud rate divisior register 0
;;;173 rUBRDIV0=( (int)(nMainClk/16./nBaud+0.5) -1 ); // Baud rate divisior register 0
0002b0 e1a00005 MOV r0,r5
0002b4 ebfffffe BL __aeabi_i2d
0002b8 e58d0020 STR r0,[sp,#0x20]
0002bc e58d1024 STR r1,[sp,#0x24]
0002c0 e1a00004 MOV r0,r4
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -