prev_cmp_lab1.qmsg

My first project written in Quartus II by using VHDL, executed some tasks that display word on 7-seg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 12 15:49:09 2009 " "Info: Processing started: Tue May 12 15:49:09 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off lab1 -c lab1 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lab1 -c lab1" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "lab1.v 3 3 " "Info: Found 3 design units, including 3 entities, in source file lab1.v" { { "Info" "ISGN_ENTITY_NAME" "1 lab1 " "Info: Found entity 1: lab1" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "2 mux_3bit_5tol " "Info: Found entity 2: mux_3bit_5tol" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 20 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "3 char_7seg " "Info: Found entity 3: char_7seg" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 50 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "HEX5 lab1.v(12) " "Warning (10236): Verilog HDL Implicit Net warning at lab1.v(12): created implicit net for \"HEX5\"" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 12 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "HEX6 lab1.v(13) " "Warning (10236): Verilog HDL Implicit Net warning at lab1.v(13): created implicit net for \"HEX6\"" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 13 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "HEX7 lab1.v(14) " "Warning (10236): Verilog HDL Implicit Net warning at lab1.v(14): created implicit net for \"HEX7\"" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 14 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "lab1 " "Info: Elaborating entity \"lab1\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX0\[0\] lab1.v(3) " "Warning (10034): Output port \"HEX0\[0\]\" at lab1.v(3) has no driver" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 3 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX0\[1\] lab1.v(3) " "Warning (10034): Output port \"HEX0\[1\]\" at lab1.v(3) has no driver" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 3 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX0\[2\] lab1.v(3) " "Warning (10034): Output port \"HEX0\[2\]\" at lab1.v(3) has no driver" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 3 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX0\[3\] lab1.v(3) " "Warning (10034): Output port \"HEX0\[3\]\" at lab1.v(3) has no driver" {  } { { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 3 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0 0}