prev_cmp_lab1.tan.qmsg

My first project written in Quartus II by using VHDL, executed some tasks that display word on 7-seg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 12 15:49:27 2009 " "Info: Processing started: Tue May 12 15:49:27 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off lab1 -c lab1 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off lab1 -c lab1 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "SW\[15\] HEX3\[0\] 15.555 ns Longest " "Info: Longest tpd from source pin \"SW\[15\]\" to destination pin \"HEX3\[0\]\" is 15.555 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.832 ns) 0.832 ns SW\[15\] 1 PIN PIN_U4 4 " "Info: 1: + IC(0.000 ns) + CELL(0.832 ns) = 0.832 ns; Loc. = PIN_U4; Fanout = 4; PIN Node = 'SW\[15\]'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { SW[15] } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.744 ns) + CELL(0.438 ns) 6.014 ns mux_3bit_5tol:M0\|Me\[2\]~118 2 COMB LCCOMB_X4_Y12_N2 5 " "Info: 2: + IC(4.744 ns) + CELL(0.438 ns) = 6.014 ns; Loc. = LCCOMB_X4_Y12_N2; Fanout = 5; COMB Node = 'mux_3bit_5tol:M0\|Me\[2\]~118'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "5.182 ns" { SW[15] mux_3bit_5tol:M0|Me[2]~118 } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.277 ns) + CELL(0.419 ns) 6.710 ns mux_3bit_5tol:M0\|Me\[0\]~126 3 COMB LCCOMB_X4_Y12_N6 1 " "Info: 3: + IC(0.277 ns) + CELL(0.419 ns) = 6.710 ns; Loc. = LCCOMB_X4_Y12_N6; Fanout = 1; COMB Node = 'mux_3bit_5tol:M0\|Me\[0\]~126'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "0.696 ns" { mux_3bit_5tol:M0|Me[2]~118 mux_3bit_5tol:M0|Me[0]~126 } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.270 ns) + CELL(0.438 ns) 7.418 ns mux_3bit_5tol:M0\|Me\[0\]~127 4 COMB LCCOMB_X4_Y12_N0 3 " "Info: 4: + IC(0.270 ns) + CELL(0.438 ns) = 7.418 ns; Loc. = LCCOMB_X4_Y12_N0; Fanout = 3; COMB Node = 'mux_3bit_5tol:M0\|Me\[0\]~127'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "0.708 ns" { mux_3bit_5tol:M0|Me[0]~126 mux_3bit_5tol:M0|Me[0]~127 } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.396 ns) + CELL(0.419 ns) 12.233 ns char_7seg:H0\|Display~131 5 COMB LCCOMB_X64_Y8_N22 1 " "Info: 5: + IC(4.396 ns) + CELL(0.419 ns) = 12.233 ns; Loc. = LCCOMB_X64_Y8_N22; Fanout = 1; COMB Node = 'char_7seg:H0\|Display~131'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "4.815 ns" { mux_3bit_5tol:M0|Me[0]~127 char_7seg:H0|Display~131 } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 52 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.690 ns) + CELL(2.632 ns) 15.555 ns HEX3\[0\] 6 PIN PIN_Y23 0 " "Info: 6: + IC(0.690 ns) + CELL(2.632 ns) = 15.555 ns; Loc. = PIN_Y23; Fanout = 0; PIN Node = 'HEX3\[0\]'" {  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "3.322 ns" { char_7seg:H0|Display~131 HEX3[0] } "NODE_NAME" } } { "lab1.v" "" { Text "C:/Documents and Settings/Khang/Desktop/TTTN/project/Lab1/lab1.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.178 ns ( 33.29 % ) " "Info: Total cell delay = 5.178 ns ( 33.29 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.377 ns ( 66.71 % ) " "Info: Total interconnect delay = 10.377 ns ( 66.71 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "15.555 ns" { SW[15] mux_3bit_5tol:M0|Me[2]~118 mux_3bit_5tol:M0|Me[0]~126 mux_3bit_5tol:M0|Me[0]~127 char_7seg:H0|Display~131 HEX3[0] } "NODE_NAME" } } { "c:/altera/81/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/81/quartus/bin/Technology_Viewer.qrui" "15.555 ns" { SW[15] {} SW[15]~combout {} mux_3bit_5tol:M0|Me[2]~118 {} mux_3bit_5tol:M0|Me[0]~126 {} mux_3bit_5tol:M0|Me[0]~127 {} char_7seg:H0|Display~131 {} HEX3[0] {} } { 0.000ns 0.000ns 4.744ns 0.277ns 0.270ns 4.396ns 0.690ns } { 0.000ns 0.832ns 0.438ns 0.419ns 0.438ns 0.419ns 2.632ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "129 " "Info: Peak virtual memory: 129 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 12 15:49:28 2009 " "Info: Processing ended: Tue May 12 15:49:28 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}