tan_noc_worm_mesh_arbiter.pr.c

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				req_pk_num++;
				if((op_intrpt_type() == OPC_INTRPT_STAT) && (op_intrpt_stat() == FIFO_mid)) {
					flag_mid = op_stat_read(FIFO_mid);
					isoccupy_mid = 1;
					req_mid++;
					if(flag_mid > 2) {
					    dest_address_mid = flag_mid - 3;
						flag_mid = 1;
					}
					if(isoccupy == 0) {
						isoccupy = 1;
						priority = 1;
					}
				}	
				else if((op_intrpt_type() == OPC_INTRPT_STAT) && (op_intrpt_stat() == FIFO_east)) {
					flag_east = op_stat_read(FIFO_east);
					isoccupy_east = 1;
					req_east++;
					if(flag_east > 2) {
						dest_address_east = flag_east - 3;
						flag_east = 1;
					}
					if(isoccupy == 0) {
						isoccupy = 1;
						priority = 2;
					}
				}
				else if((op_intrpt_type() == OPC_INTRPT_STAT) && (op_intrpt_stat() == FIFO_south)) {
					flag_east = op_stat_read(FIFO_south);
					isoccupy_south = 1;
					req_south++;
					if(flag_south > 2) {
						dest_address_south = flag_south - 3;
						flag_south = 1;
					}
					if(isoccupy == 0) {
						isoccupy = 1;
						priority = 3;
					}
				}
				else if((op_intrpt_type() == OPC_INTRPT_STAT) && (op_intrpt_stat() == FIFO_west)) {
					flag_west = op_stat_read(FIFO_west);
					isoccupy_west = 1;
					req_west++;
					if(flag_west > 2) {
						dest_address_west = flag_west - 3;
						flag_west = 1;
					}
					if(isoccupy == 0) {
						isoccupy = 1;
						priority = 4;
					}
				}	
				else if((op_intrpt_type() == OPC_INTRPT_STAT) && (op_intrpt_stat() == FIFO_north)){
					flag_north = op_stat_read(FIFO_north);
					isoccupy_north = 1;
					req_north++;
					if(flag_north > 2) {
						dest_address_north = flag_north - 3;
						flag_north = 1;
					}
					if(isoccupy == 0) {
						isoccupy = 1;
						priority = 5;
					}
				}
					
				if(crossbar_busy == 1 || next_fifo_full == 1)
					wait = 1;
				else
					{
					wait = 0;
					if(op_sim_time() != t_flag)
						{
						t_flag = op_sim_time();
						op_intrpt_schedule_self (op_sim_time (),0);
						}
					}
				
				}
				FSM_PROFILE_SECTION_OUT (state3_enter_exec)

			/** state (arbiter_start) exit executives **/
			FSM_STATE_EXIT_FORCED (3, "arbiter_start", "tan_noc_worm_mesh_arbiter [arbiter_start exit execs]")


			/** state (arbiter_start) transition processing **/
			FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [arbiter_start trans conditions]", state3_trans_conds)
			FSM_INIT_COND (!wait)
			FSM_TEST_COND (wait)
			FSM_TEST_LOGIC ("arbiter_start")
			FSM_PROFILE_SECTION_OUT (state3_trans_conds)

			FSM_TRANSIT_SWITCH
				{
				FSM_CASE_TRANSIT (0, 1, state1_enter_exec, ;, "!wait", "", "arbiter_start", "idel")
				FSM_CASE_TRANSIT (1, 7, state7_enter_exec, ;, "wait", "", "arbiter_start", "wait")
				}
				/*---------------------------------------------------------*/



			/** state (corssbar_busy) enter executives **/
			FSM_STATE_ENTER_FORCED (4, "corssbar_busy", state4_enter_exec, "tan_noc_worm_mesh_arbiter [corssbar_busy enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [corssbar_busy enter execs]", state4_enter_exec)
				{
				/*judging whether the crossbar are transmitting packets at that time or not */
				
				    crossbar_busy = 1;
				}
				FSM_PROFILE_SECTION_OUT (state4_enter_exec)

			/** state (corssbar_busy) exit executives **/
			FSM_STATE_EXIT_FORCED (4, "corssbar_busy", "tan_noc_worm_mesh_arbiter [corssbar_busy exit execs]")


			/** state (corssbar_busy) transition processing **/
			FSM_TRANSIT_FORCE (1, state1_enter_exec, ;, "default", "", "corssbar_busy", "idel")
				/*---------------------------------------------------------*/



			/** state (arbiter) enter executives **/
			FSM_STATE_ENTER_FORCED (5, "arbiter", state5_enter_exec, "tan_noc_worm_mesh_arbiter [arbiter enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [arbiter enter execs]", state5_enter_exec)
				{
				
				/* arbiter */
				
				/*********************************************************************************/
				
				// process mid request.
				if(priority == 1) {
					if(next_fifo_full == 0 && req_mid != 0) {
						if(flag_mid != 2) {   // 判断是否是包尾。
							op_stat_write(mid_allow, 1.0);
						}
						else {
							op_stat_write(mid_allow, 1.0);
							isoccupy_mid = 0;
							isoccupy = 0;
							if(isoccupy_east == 1) { isoccupy = 1; priority = 2;}
							else if(isoccupy_south == 1) { isoccupy = 1; priority = 3;}
							else if(isoccupy_west == 1) { isoccupy = 1; priority = 4;}
							else if(isoccupy_north == 1) {isoccupy = 1; priority = 5;}
							else priority = 0;
						}
						//printf("fifo_mid_allow \n");
						req_mid--;
					}
				}
				
				// process east request.
				else if(priority == 2) {
					if(next_fifo_full == 0 && req_east != 0) {
						if(flag_east != 2) {  // 判断是否是包尾。
							op_stat_write(east_allow, 1.0);
						}
						else {
							op_stat_write(east_allow, 1.0);
							isoccupy_east = 0;
							isoccupy = 0;
							if(isoccupy_south == 1) {isoccupy = 1; priority = 3;}
							else if(isoccupy_west == 1) { isoccupy = 1; priority = 4;}
							else if(isoccupy_north == 1) {isoccupy = 1; priority = 5;}
							else if(isoccupy_mid == 1) { isoccupy = 1; priority = 1;}
							else priority = 0;
						}
						req_east--;
					}
				}
				
				// process south request.
				else if(priority == 3) {
					if(next_fifo_full == 0 && req_south != 0) {
						if(flag_south != 2) {  // 判断是否是包尾。
							op_stat_write(south_allow, 1.0);
						}
						else {
							op_stat_write(south_allow, 1.0);
							isoccupy_south = 0;
							isoccupy = 0;
							if(isoccupy_west == 1) { isoccupy = 1; priority = 4;}
							else if(isoccupy_north == 1) {isoccupy = 1; priority = 5;}
							else if(isoccupy_mid == 1) { isoccupy = 1; priority = 1;}
							else if(isoccupy_east == 1) { isoccupy = 1; priority = 2;}
							else priority = 0;
						}
						req_south--;
					}
				}
				
				// process west request.
				else if(priority == 4) {
					if(next_fifo_full == 0 && req_west != 0) {
						if(flag_west != 2) {  // 判断是否是包尾。
							op_stat_write(west_allow, 1.0);
						}
						else {
							op_stat_write(west_allow, 1.0);
							isoccupy_west = 0;
							isoccupy = 0;
							if(isoccupy_north == 1) {isoccupy = 1; priority = 5;}
							else if(isoccupy_mid == 1) { isoccupy = 1; priority = 1;}
							else if(isoccupy_east == 1) { isoccupy = 1; priority = 2;}
							else if(isoccupy_south == 1) { isoccupy = 1; priority = 3;}
							else priority = 0;
						}
						req_west--;
					}
				}
				
				// process north request.
				else if(priority == 5) {
					if(next_fifo_full == 0 && req_north != 0) {
						if(flag_north != 2) {  // 判断是否是包尾。
							op_stat_write(north_allow, 1.0);
						}
						else {
							op_stat_write(north_allow, 1.0);
							isoccupy_north = 0;
							isoccupy = 0;
							if(isoccupy_mid == 1) { isoccupy = 1; priority = 1;}
							else if(isoccupy_east == 1) { isoccupy = 1; priority = 2;}
							else if(isoccupy_south == 1) { isoccupy = 1; priority = 3;}
							else if(isoccupy_west == 1) { isoccupy = 1; priority = 4;}
							else priority = 0;
						}
						req_north--;
					}
				}
				}
				FSM_PROFILE_SECTION_OUT (state5_enter_exec)

			/** state (arbiter) exit executives **/
			FSM_STATE_EXIT_FORCED (5, "arbiter", "tan_noc_worm_mesh_arbiter [arbiter exit execs]")


			/** state (arbiter) transition processing **/
			FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [arbiter trans conditions]", state5_trans_conds)
			FSM_INIT_COND (req_pk_num==0)
			FSM_TEST_COND (req_pk_num!=0)
			FSM_TEST_LOGIC ("arbiter")
			FSM_PROFILE_SECTION_OUT (state5_trans_conds)

			FSM_TRANSIT_SWITCH
				{
				FSM_CASE_TRANSIT (0, 1, state1_enter_exec, ;, "req_pk_num==0", "", "arbiter", "idel")
				FSM_CASE_TRANSIT (1, 7, state7_enter_exec, ;, "req_pk_num!=0", "", "arbiter", "wait")
				}
				/*---------------------------------------------------------*/



			/** state (crossbar_free) enter executives **/
			FSM_STATE_ENTER_FORCED (6, "crossbar_free", state6_enter_exec, "tan_noc_worm_mesh_arbiter [crossbar_free enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [crossbar_free enter execs]", state6_enter_exec)
				{
				crossbar_busy = 0;
				}
				FSM_PROFILE_SECTION_OUT (state6_enter_exec)

			/** state (crossbar_free) exit executives **/
			FSM_STATE_EXIT_FORCED (6, "crossbar_free", "tan_noc_worm_mesh_arbiter [crossbar_free exit execs]")


			/** state (crossbar_free) transition processing **/
			FSM_TRANSIT_FORCE (1, state1_enter_exec, ;, "default", "", "crossbar_free", "idel")
				/*---------------------------------------------------------*/



			/** state (wait) enter executives **/
			FSM_STATE_ENTER_UNFORCED (7, "wait", state7_enter_exec, "tan_noc_worm_mesh_arbiter [wait enter execs]")

			/** blocking after enter executives of unforced state. **/
			FSM_EXIT (15,"tan_noc_worm_mesh_arbiter")


			/** state (wait) exit executives **/
			FSM_STATE_EXIT_UNFORCED (7, "wait", "tan_noc_worm_mesh_arbiter [wait exit execs]")


			/** state (wait) transition processing **/
			FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [wait trans conditions]", state7_trans_conds)
			FSM_INIT_COND (REQUEST&&(crossbar_busy == 0))
			FSM_TEST_COND (FLOW_CONTROL&&(crossbar_busy == 0))
			FSM_TEST_COND (CROSSBAR_BUSY)
			FSM_TEST_COND (CROSSBAR_FREE)
			FSM_TEST_COND (REQUEST&&(crossbar_busy == 1))
			FSM_TEST_COND (SELF_INTRPT)
			FSM_TEST_COND (FLOW_CONTROL&&(crossbar_busy == 1))
			FSM_TEST_LOGIC ("wait")
			FSM_PROFILE_SECTION_OUT (state7_trans_conds)

			FSM_TRANSIT_SWITCH
				{
				FSM_CASE_TRANSIT (0, 3, state3_enter_exec, ;, "REQUEST&&(crossbar_busy == 0)", "", "wait", "arbiter_start")
				FSM_CASE_TRANSIT (1, 2, state2_enter_exec, ;, "FLOW_CONTROL&&(crossbar_busy == 0)", "", "wait", "flow_control")
				FSM_CASE_TRANSIT (2, 8, state8_enter_exec, ;, "CROSSBAR_BUSY", "", "wait", "corssbar_busy_0")
				FSM_CASE_TRANSIT (3, 9, state9_enter_exec, ;, "CROSSBAR_FREE", "", "wait", "crossbar_free_0")
				FSM_CASE_TRANSIT (4, 11, state11_enter_exec, ;, "REQUEST&&(crossbar_busy == 1)", "", "wait", "arbiter_start_1")
				FSM_CASE_TRANSIT (5, 7, state7_enter_exec, ;, "SELF_INTRPT", "", "wait", "wait")
				FSM_CASE_TRANSIT (6, 7, state7_enter_exec, ;, "FLOW_CONTROL&&(crossbar_busy == 1)", "", "wait", "wait")
				}
				/*---------------------------------------------------------*/



			/** state (corssbar_busy_0) enter executives **/
			FSM_STATE_ENTER_FORCED (8, "corssbar_busy_0", state8_enter_exec, "tan_noc_worm_mesh_arbiter [corssbar_busy_0 enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [corssbar_busy_0 enter execs]", state8_enter_exec)
				{
				/*judging whether the crossbar are transmitting packets at that time or not */
				
				    crossbar_busy = 1;
				}
				FSM_PROFILE_SECTION_OUT (state8_enter_exec)

			/** state (corssbar_busy_0) exit executives **/
			FSM_STATE_EXIT_FORCED (8, "corssbar_busy_0", "tan_noc_worm_mesh_arbiter [corssbar_busy_0 exit execs]")


			/** state (corssbar_busy_0) transition processing **/
			FSM_TRANSIT_FORCE (7, state7_enter_exec, ;, "default", "", "corssbar_busy_0", "wait")
				/*---------------------------------------------------------*/



			/** state (crossbar_free_0) enter executives **/
			FSM_STATE_ENTER_FORCED (9, "crossbar_free_0", state9_enter_exec, "tan_noc_worm_mesh_arbiter [crossbar_free_0 enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [crossbar_free_0 enter execs]", state9_enter_exec)
				{
				
				crossbar_busy = 0;
				}
				FSM_PROFILE_SECTION_OUT (state9_enter_exec)

			/** state (crossbar_free_0) exit executives **/
			FSM_STATE_EXIT_FORCED (9, "crossbar_free_0", "tan_noc_worm_mesh_arbiter [crossbar_free_0 exit execs]")


			/** state (crossbar_free_0) transition processing **/
			FSM_TRANSIT_FORCE (5, state5_enter_exec, ;, "default", "", "crossbar_free_0", "arbiter")
				/*---------------------------------------------------------*/



			/** state (flow_control_0) enter executives **/
			FSM_STATE_ENTER_FORCED (10, "flow_control_0", state10_enter_exec, "tan_noc_worm_mesh_arbiter [flow_control_0 enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [flow_control_0 enter execs]", state10_enter_exec)
				{
				/*modify the flag value about next_fifo state*/
				if(op_stat_read(FIFO_next)==1)
					next_fifo_full = 1;
				else
					next_fifo_full = 0;
				}
				FSM_PROFILE_SECTION_OUT (state10_enter_exec)

			/** state (flow_control_0) exit executives **/
			FSM_STATE_EXIT_FORCED (10, "flow_control_0", "tan_noc_worm_mesh_arbiter [flow_control_0 exit execs]")


			/** state (flow_control_0) transition processing **/
			FSM_TRANSIT_FORCE (1, state1_enter_exec, ;, "default", "", "flow_control_0", "idel")
				/*---------------------------------------------------------*/



			/** state (arbiter_start_1) enter executives **/
			FSM_STATE_ENTER_FORCED (11, "arbiter_start_1", state11_enter_exec, "tan_noc_worm_mesh_arbiter [arbiter_start_1 enter execs]")
				FSM_PROFILE_SECTION_IN ("tan_noc_worm_mesh_arbiter [arbiter_start_1 enter execs]", state11_enter_exec)
				{