saa9730.c

linux和2410结合开发 用他可以生成2410所需的zImage文件

/*
 * Carsten Langgaard, [e-mail]
 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 *
 * SAA9730 ethernet driver.
 *
 */

#include <linux/init.h>
#include <linux/netdevice.h>
#include <linux/delay.h>
#include <linux/etherdevice.h>
#include <linux/module.h>
#include <linux/skbuff.h>
#include <linux/pci.h>

#include <asm/addrspace.h>
#include <asm/mips-boards/prom.h>

#include "saa9730.h"

#ifdef LAN_SAA9730_DEBUG
int lan_saa9730_debug = LAN_SAA9730_DEBUG;
#else
int lan_saa9730_debug;
#endif


/* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
static unsigned int pci_irq_line;

#define INL(a)     inl((unsigned long)a)
#define OUTL(x,a)  outl(x,(unsigned long)a)

static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
{
	OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptBlock1);
	OUTL(INL(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptStatus1);
	OUTL(INL(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
	     EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
}
static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
{
	OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptBlock1);
	OUTL(INL(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptEnable1);
}

static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
{
	OUTL(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
}

static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
{
	OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptBlock1);
}

static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
{
	OUTL(INL(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
	     &lp->evm_saa9730_regs->InterruptBlock1);
}

static void show_saa9730_regs(struct lan_saa9730_private *lp)
{
	int i, j;
	printk("TxmBufferA = %x\n", lp->TxmBuffer[0][0]);
	printk("TxmBufferB = %x\n", lp->TxmBuffer[1][0]);
	printk("RcvBufferA = %x\n", lp->RcvBuffer[0][0]);
	printk("RcvBufferB = %x\n", lp->RcvBuffer[1][0]);
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
			printk("TxmBuffer[%d][%d] = %x\n", i, j,
			       le32_to_cpu(*(unsigned int *)
					   lp->TxmBuffer[i][j]));
		}
	}
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
			printk("RcvBuffer[%d][%d] = %x\n", i, j,
			       le32_to_cpu(*(unsigned int *)
					   lp->RcvBuffer[i][j]));
		}
	}
	printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
	       INL(&lp->evm_saa9730_regs->InterruptBlock1));
	printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
	       INL(&lp->evm_saa9730_regs->InterruptStatus1));
	printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
	       INL(&lp->evm_saa9730_regs->InterruptEnable1));
	printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
	       INL(&lp->lan_saa9730_regs->Ok2Use));
	printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
	printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
	printk("lp->PendingTxmBufferIndex = %x\n",
	       lp->PendingTxmBufferIndex);
	printk("lp->PendingTxmPacketIndex = %x\n",
	       lp->PendingTxmPacketIndex);
	printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
	       INL(&lp->lan_saa9730_regs->LanDmaCtl));
	printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
	       INL(&lp->lan_saa9730_regs->DmaStatus));
	printk("lp->lan_saa9730_regs->CamCtl = %x\n",
	       INL(&lp->lan_saa9730_regs->CamCtl));
	printk("lp->lan_saa9730_regs->TxCtl = %x\n",
	       INL(&lp->lan_saa9730_regs->TxCtl));
	printk("lp->lan_saa9730_regs->TxStatus = %x\n",
	       INL(&lp->lan_saa9730_regs->TxStatus));
	printk("lp->lan_saa9730_regs->RxCtl = %x\n",
	       INL(&lp->lan_saa9730_regs->RxCtl));
	printk("lp->lan_saa9730_regs->RxStatus = %x\n",
	       INL(&lp->lan_saa9730_regs->RxStatus));
	for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
		OUTL(i, &lp->lan_saa9730_regs->CamAddress);
		printk("lp->lan_saa9730_regs->CamData = %x\n",
		       INL(&lp->lan_saa9730_regs->CamData));
	}
	printk("lp->stats.tx_packets = %lx\n", lp->stats.tx_packets);
	printk("lp->stats.tx_errors = %lx\n", lp->stats.tx_errors);
	printk("lp->stats.tx_aborted_errors = %lx\n",
	       lp->stats.tx_aborted_errors);
	printk("lp->stats.tx_window_errors = %lx\n",
	       lp->stats.tx_window_errors);
	printk("lp->stats.tx_carrier_errors = %lx\n",
	       lp->stats.tx_carrier_errors);
	printk("lp->stats.tx_fifo_errors = %lx\n",
	       lp->stats.tx_fifo_errors);
	printk("lp->stats.tx_heartbeat_errors = %lx\n",
	       lp->stats.tx_heartbeat_errors);
	printk("lp->stats.collisions = %lx\n", lp->stats.collisions);

	printk("lp->stats.rx_packets = %lx\n", lp->stats.rx_packets);
	printk("lp->stats.rx_errors = %lx\n", lp->stats.rx_errors);
	printk("lp->stats.rx_dropped = %lx\n", lp->stats.rx_dropped);
	printk("lp->stats.rx_crc_errors = %lx\n", lp->stats.rx_crc_errors);
	printk("lp->stats.rx_frame_errors = %lx\n",
	       lp->stats.rx_frame_errors);
	printk("lp->stats.rx_fifo_errors = %lx\n",
	       lp->stats.rx_fifo_errors);
	printk("lp->stats.rx_length_errors = %lx\n",
	       lp->stats.rx_length_errors);

	printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
	printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
	printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
	printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
	printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
	printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
	       INL(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
}

static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
{
	int i, j;

	/* Init RX buffers */
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
			*(unsigned int *) lp->RcvBuffer[i][j] =
			    cpu_to_le32(RXSF_READY <<
					RX_STAT_CTL_OWNER_SHF);
		}
	}

	/* Init TX buffers */
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
			*(unsigned int *) lp->TxmBuffer[i][j] =
			    cpu_to_le32(TXSF_EMPTY <<
					TX_STAT_CTL_OWNER_SHF);
		}
	}
}

static int lan_saa9730_allocate_buffers(struct lan_saa9730_private *lp)
{
	unsigned int mem_size;
	void *Pa;
	unsigned int i, j, RcvBufferSize, TxmBufferSize;
	unsigned int buffer_start;

	/* 
	 * Allocate all RX and TX packets in one chunk. 
	 * The Rx and Tx packets must be PACKET_SIZE aligned.
	 */
	mem_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
		    LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
	    LAN_SAA9730_PACKET_SIZE;
	buffer_start =
	    (unsigned int) kmalloc(mem_size, GFP_DMA | GFP_KERNEL);

	/* 
	 * Set DMA buffer to kseg1 (uncached).
	 * Make sure to flush before using it uncached.
	 */
	Pa = (void *) KSEG1ADDR((buffer_start + LAN_SAA9730_PACKET_SIZE) &
				~(LAN_SAA9730_PACKET_SIZE - 1));
	dma_cache_wback_inv((unsigned long) Pa, mem_size);

	/* Initialize buffer space */
	RcvBufferSize = LAN_SAA9730_PACKET_SIZE;
	TxmBufferSize = LAN_SAA9730_PACKET_SIZE;
	lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
	lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;

	/* Init RX buffers */
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
			*(unsigned int *) Pa =
			    cpu_to_le32(RXSF_READY <<
					RX_STAT_CTL_OWNER_SHF);
			lp->RcvBuffer[i][j] = (unsigned int) Pa;
			Pa += RcvBufferSize;
		}
	}

	/* Init TX buffers */
	for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
		for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
			*(unsigned int *) Pa =
			    cpu_to_le32(TXSF_EMPTY <<
					TX_STAT_CTL_OWNER_SHF);
			lp->TxmBuffer[i][j] = (unsigned int) Pa;
			Pa += TxmBufferSize;
		}
	}

	/* 
	 * Set rx buffer A and rx buffer B to point to the first two buffer 
	 * spaces.
	 */
	OUTL(PHYSADDR(lp->RcvBuffer[0][0]),
	     &lp->lan_saa9730_regs->RxBuffA);
	OUTL(PHYSADDR(lp->RcvBuffer[1][0]),
	     &lp->lan_saa9730_regs->RxBuffB);

	/* Initialize Buffer Index */
	lp->NextRcvPacketIndex = 0;
	lp->NextRcvToUseIsA = 1;

	/* Set current buffer index & next availble packet index */
	lp->NextTxmPacketIndex = 0;
	lp->NextTxmBufferIndex = 0;
	lp->PendingTxmPacketIndex = 0;
	lp->PendingTxmBufferIndex = 0;

	/* 
	 * Set txm_buf_a and txm_buf_b to point to the first two buffer
	 * space 
	 */
	OUTL(PHYSADDR(lp->TxmBuffer[0][0]),
	     &lp->lan_saa9730_regs->TxBuffA);
	OUTL(PHYSADDR(lp->TxmBuffer[1][0]),
	     &lp->lan_saa9730_regs->TxBuffB);

	/* Set packet number */
	OUTL((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
	     (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
	     (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
	     (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
	     &lp->lan_saa9730_regs->PacketCount);

	return 0;
}

static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
{
	unsigned int i;
	unsigned char *NetworkAddress;

	NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];

	for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
		/* First set address to where data is written */
		OUTL(i, &lp->lan_saa9730_regs->CamAddress);
		OUTL((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16)
		     | (NetworkAddress[2] << 8) | NetworkAddress[3],
		     &lp->lan_saa9730_regs->CamData);
		NetworkAddress += 4;
	}
	return 0;
}

static int lan_saa9730_cam_init(struct net_device *dev)
{
	struct lan_saa9730_private *lp =
	    (struct lan_saa9730_private *) dev->priv;
	unsigned int i;

	/* Copy MAC-address into all entries. */
	for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
		memcpy((unsigned char *) lp->PhysicalAddress[i],
		       (unsigned char *) dev->dev_addr, 6);
	}

	return 0;
}

static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
{
	int i, l;

	/* Check link status, spin here till station is not busy. */
	i = 0;
	while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
		i++;
		if (i > 100) {
			printk("Error: lan_saa9730_mii_init: timeout\n");
			return -1;
		}
		mdelay(1);	/* wait 1 ms. */
	}

	/* Now set the control and address register. */
	OUTL(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
	     &lp->lan_saa9730_regs->StationMgmtCtl);

	/* check link status, spin here till station is not busy */
	i = 0;
	while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
		i++;
		if (i > 100) {
			printk("Error: lan_saa9730_mii_init: timeout\n");
			return -1;
		}
		mdelay(1);	/* wait 1 ms. */
	}

	/* Wait for 1 ms. */
	mdelay(1);

	/* Check the link status. */
	if (INL(&lp->lan_saa9730_regs->StationMgmtData) &
	    PHY_STATUS_LINK_UP) {
		/* Link is up. */
		return 0;
	} else {
		/* Link is down, reset the PHY first. */

		/* set PHY address = 'CONTROL' */
		OUTL(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
		     &lp->lan_saa9730_regs->StationMgmtCtl);

		/* Wait for 1 ms. */
		mdelay(1);

		/* set 'CONTROL' = force reset and renegotiate */
		OUTL(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
		     PHY_CONTROL_RESTART_AUTO_NEG,
		     &lp->lan_saa9730_regs->StationMgmtData);

		/* Wait for 50 ms. */
		mdelay(50);

		/* set 'BUSY' to start operation */
		OUTL(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
		     PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);

		/* await completion */
		i = 0;
		while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) &
		       MD_CA_BUSY) {
			i++;
			if (i > 100) {
				printk
				    ("Error: lan_saa9730_mii_init: timeout\n");
				return -1;
			}
			mdelay(1);	/* wait 1 ms. */
		}

		/* Wait for 1 ms. */
		mdelay(1);

		for (l = 0; l < 2; l++) {
			/* set PHY address = 'STATUS' */
			OUTL(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
			     PHY_STATUS,
			     &lp->lan_saa9730_regs->StationMgmtCtl);

			/* await completion */
			i = 0;
			while (INL(&lp->lan_saa9730_regs->StationMgmtCtl) &
			       MD_CA_BUSY) {
				i++;
				if (i > 100) {
					printk
					    ("Error: lan_saa9730_mii_init: timeout\n");
					return -1;
				}
				mdelay(1);	/* wait 1 ms. */
			}

			/* wait for 3 sec. */
			mdelay(3000);

			/* check the link status */
			if (INL(&lp->lan_saa9730_regs->StationMgmtData) &
			    PHY_STATUS_LINK_UP) {
				/* link is up */
				break;
			}
		}
	}

	return 0;
}

static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
{
	/* Initialize DMA control register. */
	OUTL((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
	     (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
	     (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
	     | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
	     DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
	     &lp->lan_saa9730_regs->LanDmaCtl);

	/* Initial MAC control register. */
	OUTL((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
	     &lp->lan_saa9730_regs->MacCtl);

	/* Initialize CAM control register. */
	OUTL(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
	     &lp->lan_saa9730_regs->CamCtl);

	/* 
	 * Initialize CAM enable register, only turn on first entry, should
	 * contain own addr. 
	 */
	OUTL(0x0001, &lp->lan_saa9730_regs->CamEnable);

	/* Initialize Tx control register */
	OUTL(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);

	/* Initialize Rcv control register */
	OUTL(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);

	/* Reset DMA engine */
	OUTL(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);

	return 0;
}

static int lan_saa9730_stop(struct lan_saa9730_private *lp)
{
	int i;

	/* Stop DMA first */
	OUTL(INL(&lp->lan_saa9730_regs->LanDmaCtl) &
	     ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
	     &lp->lan_saa9730_regs->LanDmaCtl);

	/* Set the SW Reset bits in DMA and MAC control registers */
	OUTL(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
	OUTL(INL(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
	     &lp->lan_saa9730_regs->MacCtl);

	/* 
	 * Wait for MAC reset to have finished. The reset bit is auto cleared
	 * when the reset is done.
	 */
	i = 0;
	while (INL(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
		i++;
		if (i > 100) {
			printk
			    ("Error: lan_sa9730_stop: MAC reset timeout\n");
			return -1;
		}
		mdelay(1);	/* wait 1 ms. */
	}

	return 0;
}

static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
{
	/* Stop lan controller. */
	lan_saa9730_stop(lp);

	OUTL(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
	     &lp->lan_saa9730_regs->Timeout);

	return 0;
}

static int lan_saa9730_start(struct lan_saa9730_private *lp)
{
	lan_saa9730_buffer_init(lp);

	/* Initialize Rx Buffer Index */
	lp->NextRcvPacketIndex = 0;
	lp->NextRcvToUseIsA = 1;

	/* Set current buffer index & next availble packet index */
	lp->NextTxmPacketIndex = 0;
	lp->NextTxmBufferIndex = 0;
	lp->PendingTxmPacketIndex = 0;
	lp->PendingTxmBufferIndex = 0;

	OUTL(INL(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
	     DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);

	/* For Tx, turn on MAC then DMA */
	OUTL(INL(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
	     &lp->lan_saa9730_regs->TxCtl);

	/* For Rx, turn on DMA then MAC */
	OUTL(INL(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
	     &lp->lan_saa9730_regs->RxCtl);

	/* Set Ok2Use to let hardware owns the buffers */
	OUTL(OK2USE_RX_A | OK2USE_RX_B | OK2USE_TX_A | OK2USE_TX_B,
	     &lp->lan_saa9730_regs->Ok2Use);