📄 sunhme.h
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/* Here are some PHY addresses. */#define TCV_PADDR_ETX 0 /* Internal transceiver */#define TCV_PADDR_ITX 1 /* External transceiver *//* Transceiver status register */#define TCV_STAT_BASIC 0xffff0000 /* The "basic" part */#define TCV_STAT_NORMAL 0x0000ffff /* The "non-basic" part *//* Inside the Happy Meal transceiver is the physical layer, they use an * implementations for National Semiconductor, part number DP83840VCE. * You can retrieve the data sheets and programming docs for this beast * from http://www.national.com/ * * The DP83840 is capable of both 10 and 100Mbps ethernet, in both * half and full duplex mode. It also supports auto negotiation. * * But.... THIS THING IS A PAIN IN THE ASS TO PROGRAM! * Debugging eeprom burnt code is more fun than programming this chip! *//* Generic MII registers defined in linux/mii.h, these below * are DP83840 specific. */#define DP83840_CSCONFIG 0x17 /* CS configuration *//* The Carrier Sense config register. */#define CSCONFIG_RESV1 0x0001 /* Unused... */#define CSCONFIG_LED4 0x0002 /* Pin for full-dplx LED4 */#define CSCONFIG_LED1 0x0004 /* Pin for conn-status LED1 */#define CSCONFIG_RESV2 0x0008 /* Unused... */#define CSCONFIG_TCVDISAB 0x0010 /* Turns off the transceiver */#define CSCONFIG_DFBYPASS 0x0020 /* Bypass disconnect function */#define CSCONFIG_GLFORCE 0x0040 /* Good link force for 100mbps */#define CSCONFIG_CLKTRISTATE 0x0080 /* Tristate 25m clock */#define CSCONFIG_RESV3 0x0700 /* Unused... */#define CSCONFIG_ENCODE 0x0800 /* 1=MLT-3, 0=binary */#define CSCONFIG_RENABLE 0x1000 /* Repeater mode enable */#define CSCONFIG_TCDISABLE 0x2000 /* Disable timeout counter */#define CSCONFIG_RESV4 0x4000 /* Unused... */#define CSCONFIG_NDISABLE 0x8000 /* Disable NRZI *//* Happy Meal descriptor rings and such. * All descriptor rings must be aligned on a 2K boundry. * All receive buffers must be 64 byte aligned. * Always write the address first before setting the ownership * bits to avoid races with the hardware scanning the ring. */struct happy_meal_rxd { u32 rx_flags; u32 rx_addr;};#define RXFLAG_OWN 0x80000000 /* 1 = hardware, 0 = software */#define RXFLAG_OVERFLOW 0x40000000 /* 1 = buffer overflow */#define RXFLAG_SIZE 0x3fff0000 /* Size of the buffer */#define RXFLAG_CSUM 0x0000ffff /* HW computed checksum */struct happy_meal_txd { u32 tx_flags; u32 tx_addr;};#define TXFLAG_OWN 0x80000000 /* 1 = hardware, 0 = software */#define TXFLAG_SOP 0x40000000 /* 1 = start of packet */#define TXFLAG_EOP 0x20000000 /* 1 = end of packet */#define TXFLAG_CSENABLE 0x10000000 /* 1 = enable hw-checksums */#define TXFLAG_CSLOCATION 0x0ff00000 /* Where to stick the csum */#define TXFLAG_CSBUFBEGIN 0x000fc000 /* Where to begin checksum */#define TXFLAG_SIZE 0x00003fff /* Size of the packet */#define TX_RING_SIZE 32 /* Must be >16 and <255, multiple of 16 */#define RX_RING_SIZE 32 /* see ERX_CFG_SIZE* for possible values */#if (TX_RING_SIZE < 16 || TX_RING_SIZE > 256 || (TX_RING_SIZE % 16) != 0)#error TX_RING_SIZE holds illegal value#endif#define TX_RING_MAXSIZE 256#define RX_RING_MAXSIZE 256/* We use a 14 byte offset for checksum computation. */#if (RX_RING_SIZE == 32)#define ERX_CFG_DEFAULT(off) (ERX_CFG_DMAENABLE|((off)<<3)|ERX_CFG_SIZE32|((14/2)<<16))#else#if (RX_RING_SIZE == 64)#define ERX_CFG_DEFAULT(off) (ERX_CFG_DMAENABLE|((off)<<3)|ERX_CFG_SIZE64|((14/2)<<16))#else#if (RX_RING_SIZE == 128)#define ERX_CFG_DEFAULT(off) (ERX_CFG_DMAENABLE|((off)<<3)|ERX_CFG_SIZE128|((14/2)<<16))#else#if (RX_RING_SIZE == 256)#define ERX_CFG_DEFAULT(off) (ERX_CFG_DMAENABLE|((off)<<3)|ERX_CFG_SIZE256|((14/2)<<16))#else#error RX_RING_SIZE holds illegal value#endif#endif#endif#endif#define NEXT_RX(num) (((num) + 1) & (RX_RING_SIZE - 1))#define NEXT_TX(num) (((num) + 1) & (TX_RING_SIZE - 1))#define PREV_RX(num) (((num) - 1) & (RX_RING_SIZE - 1))#define PREV_TX(num) (((num) - 1) & (TX_RING_SIZE - 1))#define TX_BUFFS_AVAIL(hp) \ (((hp)->tx_old <= (hp)->tx_new) ? \ (hp)->tx_old + (TX_RING_SIZE - 1) - (hp)->tx_new : \ (hp)->tx_old - (hp)->tx_new - 1)#define RX_OFFSET 2#define RX_BUF_ALLOC_SIZE (1546 + RX_OFFSET + 64)#define RX_COPY_THRESHOLD 256struct hmeal_init_block { struct happy_meal_rxd happy_meal_rxd[RX_RING_MAXSIZE]; struct happy_meal_txd happy_meal_txd[TX_RING_MAXSIZE];};#define hblock_offset(mem, elem) \((__u32)((unsigned long)(&(((struct hmeal_init_block *)0)->mem[elem]))))/* Now software state stuff. */enum happy_transceiver { external = 0, internal = 1, none = 2,};/* Timer state engine. */enum happy_timer_state { arbwait = 0, /* Waiting for auto negotiation to complete. */ lupwait = 1, /* Auto-neg complete, awaiting link-up status. */ ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */ asleep = 3, /* Time inactive. */};struct quattro;/* Happy happy, joy joy! */struct happy_meal { unsigned long gregs; /* Happy meal global registers */ struct hmeal_init_block *happy_block; /* RX and TX descriptors (CPU addr) */#if defined(CONFIG_SBUS) && defined(CONFIG_PCI) u32 (*read_desc32)(u32 *); void (*write_txd)(struct happy_meal_txd *, u32, u32); void (*write_rxd)(struct happy_meal_rxd *, u32, u32); u32 (*dma_map)(void *, void *, long, int); void (*dma_unmap)(void *, u32, long, int); void (*dma_sync)(void *, u32, long, int);#endif /* This is either a sbus_dev or a pci_dev. */ void *happy_dev; spinlock_t happy_lock; struct sk_buff *rx_skbs[RX_RING_SIZE]; struct sk_buff *tx_skbs[TX_RING_SIZE]; int rx_new, tx_new, rx_old, tx_old; struct net_device_stats net_stats; /* Statistical counters */#if defined(CONFIG_SBUS) && defined(CONFIG_PCI) u32 (*read32)(unsigned long); void (*write32)(unsigned long, u32);#endif unsigned long etxregs; /* External transmitter regs */ unsigned long erxregs; /* External receiver regs */ unsigned long bigmacregs; /* BIGMAC core regs */ unsigned long tcvregs; /* MIF transceiver regs */ __u32 hblock_dvma; /* DVMA visible address happy block */ unsigned int happy_flags; /* Driver state flags */ enum happy_transceiver tcvr_type; /* Kind of transceiver in use */ unsigned int happy_bursts; /* Get your mind out of the gutter */ unsigned int paddr; /* PHY address for transceiver */ unsigned short hm_revision; /* Happy meal revision */ unsigned short sw_bmcr; /* SW copy of BMCR */ unsigned short sw_bmsr; /* SW copy of BMSR */ unsigned short sw_physid1; /* SW copy of PHYSID1 */ unsigned short sw_physid2; /* SW copy of PHYSID2 */ unsigned short sw_advertise; /* SW copy of ADVERTISE */ unsigned short sw_lpa; /* SW copy of LPA */ unsigned short sw_expansion; /* SW copy of EXPANSION */ unsigned short sw_csconfig; /* SW copy of CSCONFIG */ unsigned int auto_speed; /* Auto-nego link speed */ unsigned int forced_speed; /* Force mode link speed */ unsigned int poll_data; /* MIF poll data */ unsigned int poll_flag; /* MIF poll flag */ unsigned int linkcheck; /* Have we checked the link yet? */ unsigned int lnkup; /* Is the link up as far as we know? */ unsigned int lnkdown; /* Trying to force the link down? */ unsigned int lnkcnt; /* Counter for link-up attempts. */ struct timer_list happy_timer; /* To watch the link when coming up. */ enum happy_timer_state timer_state; /* State of the auto-neg timer. */ unsigned int timer_ticks; /* Number of clicks at each state. */ struct net_device *dev; /* Backpointer */ struct quattro *qfe_parent; /* For Quattro cards */ int qfe_ent; /* Which instance on quattro */ struct happy_meal *next_module;};/* Here are the happy flags. */#define HFLAG_POLL 0x00000001 /* We are doing MIF polling */#define HFLAG_FENABLE 0x00000002 /* The MII frame is enabled */#define HFLAG_LANCE 0x00000004 /* We are using lance-mode */#define HFLAG_RXENABLE 0x00000008 /* Receiver is enabled */#define HFLAG_AUTO 0x00000010 /* Using auto-negotiation, 0 = force */#define HFLAG_FULL 0x00000020 /* Full duplex enable */#define HFLAG_MACFULL 0x00000040 /* Using full duplex in the MAC */#define HFLAG_POLLENABLE 0x00000080 /* Actually try MIF polling */#define HFLAG_RXCV 0x00000100 /* XXX RXCV ENABLE */#define HFLAG_INIT 0x00000200 /* Init called at least once */#define HFLAG_LINKUP 0x00000400 /* 1 = Link is up */#define HFLAG_PCI 0x00000800 /* PCI based Happy Meal */#define HFLAG_QUATTRO 0x00001000 /* On QFE/Quattro card */#define HFLAG_20_21 (HFLAG_POLLENABLE | HFLAG_FENABLE)#define HFLAG_NOT_A0 (HFLAG_POLLENABLE | HFLAG_FENABLE | HFLAG_LANCE | HFLAG_RXCV)/* Support for QFE/Quattro cards. */struct quattro { struct net_device *happy_meals[4]; /* This is either a sbus_dev or a pci_dev. */ void *quattro_dev; struct quattro *next; /* PROM ranges, if any. */#ifdef CONFIG_SBUS struct linux_prom_ranges ranges[8];#endif int nranges;};/* We use this to acquire receive skb's that we can DMA directly into. */#define ALIGNED_RX_SKB_ADDR(addr) \ ((((unsigned long)(addr) + (64UL - 1UL)) & ~(64UL - 1UL)) - (unsigned long)(addr))#define happy_meal_alloc_skb(__length, __gfp_flags) \({ struct sk_buff *__skb; \ __skb = alloc_skb((__length) + 64, (__gfp_flags)); \ if(__skb) { \ int __offset = (int) ALIGNED_RX_SKB_ADDR(__skb->data); \ if(__offset) \ skb_reserve(__skb, __offset); \ } \ __skb; \})#endif /* !(_SUNHME_H) */
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