declance.c

linux和2410结合开发 用他可以生成2410所需的zImage文件

/*     
 *    Lance ethernet driver for the MIPS processor based
 *      DECstation family
 *
 *
 *      adopted from sunlance.c by Richard van den Berg
 *
 *      additional sources:
 *      - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
 *        Revision 1.2
 *
 *      History:
 *
 *      v0.001: The kernel accepts the code and it shows the hardware address.
 *
 *      v0.002: Removed most sparc stuff, left only some module and dma stuff.
 *
 *      v0.003: Enhanced base address calculation from proposals by
 *      Harald Koerfgen and Thomas Riemer.
 *
 *      v0.004: lance-regs is pointing at the right addresses, added prom
 *      check. First start of address mapping and DMA.
 *
 *      v0.005: started to play around with LANCE-DMA. This driver will not work
 *      for non IOASIC lances. HK
 *
 *      v0.006: added pointer arrays to lance_private and setup routine for them
 *      in dec_lance_init. HK
 *
 *      v0.007: Big shit. The LANCE seems to use a different DMA mechanism to access
 *      the init block. This looks like one (short) word at a time, but the smallest
 *      amount the IOASIC can transfer is a (long) word. So we have a 2-2 padding here.
 *      Changed lance_init_block accordingly. The 16-16 padding for the buffers
 *      seems to be correct. HK
 *
 *     v0.008 - mods to make PMAX_LANCE work. 01/09/1999 triemer
 */

#undef DEBUG_DRIVER

static char *version =
"declance.c: v0.008 by Linux Mips DECstation task force\n";

static char *lancestr = "LANCE";

/*
 * card types
 */
#define ASIC_LANCE 1
#define PMAD_LANCE 2
#define PMAX_LANCE 3

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>

#include <asm/dec/interrupts.h>
#include <asm/dec/ioasic_ints.h>
#include <asm/dec/ioasic_addrs.h>
#include <asm/dec/machtype.h>
#include <asm/dec/tc.h>
#include <asm/dec/kn01.h>
#include <asm/wbflush.h>
#include <asm/addrspace.h>

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/hdreg.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/string.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/utsname.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <asm/io.h>
#include <linux/etherdevice.h>

#ifndef CONFIG_TC
unsigned long system_base;
unsigned long dmaptr;
#endif
static int type;

#define CRC_POLYNOMIAL_BE 0x04c11db7UL	/* Ethernet CRC, big endian */
#define CRC_POLYNOMIAL_LE 0xedb88320UL	/* Ethernet CRC, little endian */

#define LE_CSR0 0
#define LE_CSR1 1
#define LE_CSR2 2
#define LE_CSR3 3

#define LE_MO_PROM      0x8000	/* Enable promiscuous mode */

#define	LE_C0_ERR	0x8000	/* Error: set if BAB, SQE, MISS or ME is set */
#define	LE_C0_BABL	0x4000	/* BAB:  Babble: tx timeout. */
#define	LE_C0_CERR	0x2000	/* SQE:  Signal quality error */
#define	LE_C0_MISS	0x1000	/* MISS: Missed a packet */
#define	LE_C0_MERR	0x0800	/* ME:   Memory error */
#define	LE_C0_RINT	0x0400	/* Received interrupt */
#define	LE_C0_TINT	0x0200	/* Transmitter Interrupt */
#define	LE_C0_IDON	0x0100	/* IFIN: Init finished. */
#define	LE_C0_INTR	0x0080	/* Interrupt or error */
#define	LE_C0_INEA	0x0040	/* Interrupt enable */
#define	LE_C0_RXON	0x0020	/* Receiver on */
#define	LE_C0_TXON	0x0010	/* Transmitter on */
#define	LE_C0_TDMD	0x0008	/* Transmitter demand */
#define	LE_C0_STOP	0x0004	/* Stop the card */
#define	LE_C0_STRT	0x0002	/* Start the card */
#define	LE_C0_INIT	0x0001	/* Init the card */

#define	LE_C3_BSWP	0x4	/* SWAP */
#define	LE_C3_ACON	0x2	/* ALE Control */
#define	LE_C3_BCON	0x1	/* Byte control */

/* Receive message descriptor 1 */
#define LE_R1_OWN       0x80	/* Who owns the entry */
#define LE_R1_ERR       0x40	/* Error: if FRA, OFL, CRC or BUF is set */
#define LE_R1_FRA       0x20	/* FRA: Frame error */
#define LE_R1_OFL       0x10	/* OFL: Frame overflow */
#define LE_R1_CRC       0x08	/* CRC error */
#define LE_R1_BUF       0x04	/* BUF: Buffer error */
#define LE_R1_SOP       0x02	/* Start of packet */
#define LE_R1_EOP       0x01	/* End of packet */
#define LE_R1_POK       0x03	/* Packet is complete: SOP + EOP */

#define LE_T1_OWN       0x80	/* Lance owns the packet */
#define LE_T1_ERR       0x40	/* Error summary */
#define LE_T1_EMORE     0x10	/* Error: more than one retry needed */
#define LE_T1_EONE      0x08	/* Error: one retry needed */
#define LE_T1_EDEF      0x04	/* Error: deferred */
#define LE_T1_SOP       0x02	/* Start of packet */
#define LE_T1_EOP       0x01	/* End of packet */
#define LE_T1_POK	0x03	/* Packet is complete: SOP + EOP */

#define LE_T3_BUF       0x8000	/* Buffer error */
#define LE_T3_UFL       0x4000	/* Error underflow */
#define LE_T3_LCOL      0x1000	/* Error late collision */
#define LE_T3_CLOS      0x0800	/* Error carrier loss */
#define LE_T3_RTY       0x0400	/* Error retry */
#define LE_T3_TDR       0x03ff	/* Time Domain Reflectometry counter */

/* Define: 2^4 Tx buffers and 2^4 Rx buffers */

#ifndef LANCE_LOG_TX_BUFFERS
#define LANCE_LOG_TX_BUFFERS 4
#define LANCE_LOG_RX_BUFFERS 4
#endif

#define TX_RING_SIZE			(1 << (LANCE_LOG_TX_BUFFERS))
#define TX_RING_MOD_MASK		(TX_RING_SIZE - 1)

#define RX_RING_SIZE			(1 << (LANCE_LOG_RX_BUFFERS))
#define RX_RING_MOD_MASK		(RX_RING_SIZE - 1)

#define PKT_BUF_SZ		1536
#define RX_BUFF_SIZE            PKT_BUF_SZ
#define TX_BUFF_SIZE            PKT_BUF_SZ

#undef TEST_HITS
#define DEBUG_DRIVER 1

#define ZERO 0

/* The DS2000/3000 have a linear 64 KB buffer.

 * The PMAD-AA has 128 kb buffer on-board. 
 *
 * The IOASIC LANCE devices use a shared memory region. This region as seen 
 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
 * The LANCE sees this as a 64 KB long continuous memory region.
 *
 * The LANCE's DMA address is used as an index in this buffer and DMA takes
 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
 * by a 16 byte gap :-(.
 */

struct lance_rx_desc {
	unsigned short rmd0;	/* low address of packet */
	short gap0;
	unsigned char rmd1_hadr;	/* high address of packet */
	unsigned char rmd1_bits;	/* descriptor bits */
	short gap1;
	short length;		/* This length is 2s complement (negative)!
				   * Buffer length
				 */
	short gap2;
	unsigned short mblength;	/* This is the actual number of bytes received */
	short gap3;
};

struct lance_tx_desc {
	unsigned short tmd0;	/* low address of packet */
	short gap0;
	unsigned char tmd1_hadr;	/* high address of packet */
	unsigned char tmd1_bits;	/* descriptor bits */
	short gap1;
	short length;		/* Length is 2s complement (negative)! */
	short gap2;
	unsigned short misc;
	short gap3;
};


/* First part of the LANCE initialization block, described in databook. */
struct lance_init_block {
	unsigned short mode;	/* Pre-set mode (reg. 15) */
	short gap0;

	unsigned char phys_addr[12];	/* Physical ethernet address
					   * only 0, 1, 4, 5, 8, 9 are valid
					   * 2, 3, 6, 7, 10, 11 are gaps
					 */
	unsigned short filter[8];	/* Multicast filter.
					   * only 0, 2, 4, 6 are valid
					   * 1, 3, 5, 7 are gaps
					 */

	/* Receive and transmit ring base, along with extra bits. */
	unsigned short rx_ptr;	/* receive descriptor addr */
	short gap1;
	unsigned short rx_len;	/* receive len and high addr */
	short gap2;
	unsigned short tx_ptr;	/* transmit descriptor addr */
	short gap3;
	unsigned short tx_len;	/* transmit len and high addr */
	short gap4;
	char gap5[16];

	/* The buffer descriptors */
	struct lance_rx_desc brx_ring[RX_RING_SIZE];
	struct lance_tx_desc btx_ring[TX_RING_SIZE];
};

#define BUF_OFFSET_CPU sizeof(struct lance_init_block)
#define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)

#define libdesc_offset(rt, elem) \
((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))

/*
 * This works *only* for the ring descriptors
 */
#define LANCE_ADDR(x) (PHYSADDR(x) >> 1)

struct lance_private {
	char *name;
	volatile struct lance_regs *ll;
	volatile struct lance_init_block *init_block;
	volatile unsigned long *dma_ptr_reg;

	spinlock_t	lock;

	int rx_new, tx_new;
	int rx_old, tx_old;

	struct net_device_stats stats;

	unsigned short busmaster_regval;

	struct net_device *dev;	/* Backpointer        */
	struct lance_private *next_module;
	struct timer_list       multicast_timer;

	/* Pointers to the ring buffers as seen from the CPU */
	char *rx_buf_ptr_cpu[RX_RING_SIZE];
	char *tx_buf_ptr_cpu[TX_RING_SIZE];

	/* Pointers to the ring buffers as seen from the LANCE */
	char *rx_buf_ptr_lnc[RX_RING_SIZE];
	char *tx_buf_ptr_lnc[TX_RING_SIZE];
};

#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
			lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
			lp->tx_old - lp->tx_new-1)

/* The lance control ports are at an absolute address, machine and tc-slot
 * dependant.
 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
 * so we have to give the structure an extra member making rap pointing
 * at the right address
 */
struct lance_regs {
	volatile unsigned short rdp;	/* register data port */
	unsigned short pad;
	volatile unsigned short rap;	/* register address port */
};

int dec_lance_debug = 2;

/*
   #ifdef MODULE
   static struct lance_private *root_lance_dev = NULL;
   #endif
 */

static inline void writereg(volatile unsigned short *regptr, short value)
{
	*regptr = value;
	wbflush();
}

/* Load the CSR registers */
static void load_csrs(struct lance_private *lp)
{
	volatile struct lance_regs *ll = lp->ll;
	int leptr;

	/* The address space as seen from the LANCE
	 * begins at address 0. HK
	 */
	leptr = 0;

	writereg(&ll->rap, LE_CSR1);
	writereg(&ll->rdp, (leptr & 0xFFFF));
	writereg(&ll->rap, LE_CSR2);
	writereg(&ll->rdp, leptr >> 16);
	writereg(&ll->rap, LE_CSR3);
	writereg(&ll->rdp, lp->busmaster_regval);

	/* Point back to csr0 */
	writereg(&ll->rap, LE_CSR0);
}

/*
 * Our specialized copy routines
 *
 */
void cp_to_buf(void *to, const void *from, __kernel_size_t len)
{
	unsigned short *tp, *fp, clen;
	unsigned char *rtp, *rfp;

	if (type == PMAX_LANCE) {
		clen = len >> 1;
		tp = (unsigned short *) to;
		fp = (unsigned short *) from;

		while (clen--) {
			*tp++ = *fp++;
			tp++;
		}

		clen = len & 1;
		rtp = (unsigned char *) tp;
		rfp = (unsigned char *) fp;
		while (clen--) {
			*rtp++ = *rfp++;
		}
	} else {
		/*
		 * copy 16 Byte chunks
		 */
		clen = len >> 4;
		tp = (unsigned short *) to;
		fp = (unsigned short *) from;
		while (clen--) {
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			tp += 8;
		}

		/*
		 * do the rest, if any.
		 */
		clen = len & 15;
		rtp = (unsigned char *) tp;
		rfp = (unsigned char *) fp;
		while (clen--) {
			*rtp++ = *rfp++;
		}
	}

	wbflush();
}

void cp_from_buf(void *to, unsigned char *from, int len)
{
	unsigned short *tp, *fp, clen;
	unsigned char *rtp, *rfp;

	if (type == PMAX_LANCE) {
		clen = len >> 1;
		tp = (unsigned short *) to;
		fp = (unsigned short *) from;
		while (clen--) {
			*tp++ = *fp++;
			fp++;
		}

		clen = len & 1;

		rtp = (unsigned char *) tp;
		rfp = (unsigned char *) fp;

		while (clen--) {
			*rtp++ = *rfp++;
		}
	} else {

		/*
		 * copy 16 Byte chunks
		 */
		clen = len >> 4;
		tp = (unsigned short *) to;
		fp = (unsigned short *) from;
		while (clen--) {
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;
			*tp++ = *fp++;