📄 sk_g16.c
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/*- * Copyright (C) 1994 by PJD Weichmann & SWS Bern, Switzerland * * This software may be used and distributed according to the terms * of the GNU General Public License, incorporated herein by reference. * * Module : sk_g16.c * * Version : $Revision: 1.1 $ * * Author : Patrick J.D. Weichmann * * Date Created : 94/05/26 * Last Updated : $Date: 1994/06/30 16:25:15 $ * * Description : Schneider & Koch G16 Ethernet Device Driver for * Linux Kernel >= 1.1.22 * Update History : * Paul Gortmaker, 03/97: Fix for v2.1.x to use read{b,w} * write{b,w} and memcpy -> memcpy_{to,from}io * * Jeff Garzik, 06/2000, Modularize *-*/static const char rcsid[] = "$Id: sk_g16.c,v 1.1 1994/06/30 16:25:15 root Exp $";/* * The Schneider & Koch (SK) G16 Network device driver is based * on the 'ni6510' driver from Michael Hipp which can be found at * ftp://sunsite.unc.edu/pub/Linux/system/Network/drivers/nidrivers.tar.gz * * Sources: 1) ni6510.c by M. Hipp * 2) depca.c by D.C. Davies * 3) skeleton.c by D. Becker * 4) Am7990 Local Area Network Controller for Ethernet (LANCE), * AMD, Pub. #05698, June 1989 * * Many Thanks for helping me to get things working to: * * A. Cox (A.Cox@swansea.ac.uk) * M. Hipp (mhipp@student.uni-tuebingen.de) * R. Bolz (Schneider & Koch, Germany) * * To Do: * - Support of SK_G8 and other SK Network Cards. * - Autoset memory mapped RAM. Check for free memory and then * configure RAM correctly. * - SK_close should really set card in to initial state. * - Test if IRQ 3 is not switched off. Use autoirq() functionality. * (as in /drivers/net/skeleton.c) * - Implement Multicast addressing. At minimum something like * in depca.c. * - Redo the statistics part. * - Try to find out if the board is in 8 Bit or 16 Bit slot. * If in 8 Bit mode don't use IRQ 11. * - (Try to make it slightly faster.) * - Power management support */#include <linux/module.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/ptrace.h>#include <linux/fcntl.h>#include <linux/ioport.h>#include <linux/interrupt.h>#include <linux/slab.h>#include <linux/string.h> #include <linux/delay.h>#include <asm/system.h>#include <asm/io.h>#include <asm/bitops.h> #include <linux/errno.h>#include <linux/init.h>#include <linux/spinlock.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include "sk_g16.h"/* * Schneider & Koch Card Definitions * ================================= */ #define SK_NAME "SK_G16"/* * SK_G16 Configuration * -------------------- */ /* * Abbreviations * ------------- * * RAM - used for the 16KB shared memory * Boot_ROM, ROM - are used for referencing the BootEPROM * * SK_BOOT_ROM and SK_ADDR are symbolic constants used to configure * the behaviour of the driver and the SK_G16. * * ! See sk_g16.install on how to install and configure the driver ! * * SK_BOOT_ROM defines if the Boot_ROM should be switched off or not. * * SK_ADDR defines the address where the RAM will be mapped into the real * host memory. * valid addresses are from 0xa0000 to 0xfc000 in 16Kbyte steps. */ #define SK_BOOT_ROM 1 /* 1=BootROM on 0=off */#define SK_ADDR 0xcc000/* * In POS3 are bits A14-A19 of the address bus. These bits can be set * to choose the RAM address. That's why we only can choose the RAM address * in 16KB steps. */#define POS_ADDR (rom_addr>>14) /* Do not change this line *//* * SK_G16 I/O PORT's + IRQ's + Boot_ROM locations * ---------------------------------------------- *//* * As nearly every card has also SK_G16 a specified I/O Port region and * only a few possible IRQ's. * In the Installation Guide from Schneider & Koch is listed a possible * Interrupt IRQ2. IRQ2 is always IRQ9 in boards with two cascaded interrupt * controllers. So we use in SK_IRQS IRQ9. *//* Don't touch any of the following #defines. */#define SK_IO_PORTS { 0x100, 0x180, 0x208, 0x220, 0x288, 0x320, 0x328, 0x390, 0 }#define SK_IRQS { 3, 5, 9, 11, 0 }#define SK_BOOT_ROM_LOCATIONS { 0xc0000, 0xc4000, 0xc8000, 0xcc000, 0xd0000, 0xd4000, 0xd8000, 0xdc000, 0 }#define SK_BOOT_ROM_ID { 0x55, 0xaa, 0x10, 0x50, 0x06, 0x33 }/* * SK_G16 POS REGISTERS * -------------------- *//* * SK_G16 has a Programmable Option Select (POS) Register. * The POS is composed of 8 separate registers (POS0-7) which * are I/O mapped on an address set by the W1 switch. * */#define SK_POS_SIZE 8 /* 8 I/O Ports are used by SK_G16 */#define SK_POS0 ioaddr /* Card-ID Low (R) */#define SK_POS1 ioaddr+1 /* Card-ID High (R) */#define SK_POS2 ioaddr+2 /* Card-Enable, Boot-ROM Disable (RW) */#define SK_POS3 ioaddr+3 /* Base address of RAM */#define SK_POS4 ioaddr+4 /* IRQ *//* POS5 - POS7 are unused *//* * SK_G16 MAC PREFIX * ----------------- *//* * Scheider & Koch manufacturer code (00:00:a5). * This must be checked, that we are sure it is a SK card. */#define SK_MAC0 0x00#define SK_MAC1 0x00#define SK_MAC2 0x5a/* * SK_G16 ID * --------- */ /* * If POS0,POS1 contain the following ID, then we know * at which I/O Port Address we are. */#define SK_IDLOW 0xfd #define SK_IDHIGH 0x6a/* * LANCE POS Bit definitions * ------------------------- */#define SK_ROM_RAM_ON (POS2_CARD)#define SK_ROM_RAM_OFF (POS2_EPROM)#define SK_ROM_ON (inb(SK_POS2) & POS2_CARD)#define SK_ROM_OFF (inb(SK_POS2) | POS2_EPROM)#define SK_RAM_ON (inb(SK_POS2) | POS2_CARD)#define SK_RAM_OFF (inb(SK_POS2) & POS2_EPROM) #define POS2_CARD 0x0001 /* 1 = SK_G16 on 0 = off */#define POS2_EPROM 0x0002 /* 1 = Boot EPROM off 0 = on */ /* * SK_G16 Memory mapped Registers * ------------------------------ * */ #define SK_IOREG (&board->ioreg) /* LANCE data registers. */ #define SK_PORT (&board->port) /* Control, Status register */#define SK_IOCOM (&board->iocom) /* I/O Command *//* * SK_G16 Status/Control Register bits * ----------------------------------- * * (C) Controlreg (S) Statusreg *//* * Register transfer: 0 = no transfer * 1 = transferring data between LANCE and I/O reg */#define SK_IORUN 0x20 /* * LANCE interrupt: 0 = LANCE interrupt occurred * 1 = no LANCE interrupt occurred */#define SK_IRQ 0x10 #define SK_RESET 0x08 /* Reset SK_CARD: 0 = RESET 1 = normal */#define SK_RW 0x02 /* 0 = write to 1 = read from */#define SK_ADR 0x01 /* 0 = REG DataPort 1 = RAP Reg addr port */ #define SK_RREG SK_RW /* Transferdirection to read from lance */#define SK_WREG 0 /* Transferdirection to write to lance */#define SK_RAP SK_ADR /* Destination Register RAP */#define SK_RDATA 0 /* Destination Register REG DataPort *//* * SK_G16 I/O Command * ------------------ *//* * Any bitcombination sets the internal I/O bit (transfer will start) * when written to I/O Command */#define SK_DOIO 0x80 /* Do Transfer */ /* * LANCE RAP (Register Address Port). * --------------------------------- *//* * The LANCE internal registers are selected through the RAP. * The Registers are: * * CSR0 - Status and Control flags * CSR1 - Low order bits of initialize block (bits 15:00) * CSR2 - High order bits of initialize block (bits 07:00, 15:08 are reserved) * CSR3 - Allows redefinition of the Bus Master Interface. * This register must be set to 0x0002, which means BSWAP = 0, * ACON = 1, BCON = 0; * */ #define CSR0 0x00 #define CSR1 0x01 #define CSR2 0x02 #define CSR3 0x03/* * General Definitions * =================== *//* * Set the number of Tx and Rx buffers, using Log_2(# buffers). * We have 16KB RAM which can be accessed by the LANCE. In the * memory are not only the buffers but also the ring descriptors and * the initialize block. * Don't change anything unless you really know what you do. */#define LC_LOG_TX_BUFFERS 1 /* (2 == 2^^1) 2 Transmit buffers */#define LC_LOG_RX_BUFFERS 3 /* (8 == 2^^3) 8 Receive buffers *//* Descriptor ring sizes */#define TMDNUM (1 << (LC_LOG_TX_BUFFERS)) /* 2 Transmit descriptor rings */#define RMDNUM (1 << (LC_LOG_RX_BUFFERS)) /* 8 Receive Buffers *//* Define Mask for setting RMD, TMD length in the LANCE init_block */#define TMDNUMMASK (LC_LOG_TX_BUFFERS << 29)#define RMDNUMMASK (LC_LOG_RX_BUFFERS << 29)/* * Data Buffer size is set to maximum packet length. */#define PKT_BUF_SZ 1518 /* * The number of low I/O ports used by the ethercard. */#define ETHERCARD_TOTAL_SIZE SK_POS_SIZE/* * SK_DEBUG * * Here you can choose what level of debugging wanted. * * If SK_DEBUG and SK_DEBUG2 are undefined, then only the * necessary messages will be printed. * * If SK_DEBUG is defined, there will be many debugging prints * which can help to find some mistakes in configuration or even * in the driver code. * * If SK_DEBUG2 is defined, many many messages will be printed * which normally you don't need. I used this to check the interrupt * routine. * * (If you define only SK_DEBUG2 then only the messages for * checking interrupts will be printed!) * * Normal way of live is: * * For the whole thing get going let both symbolic constants * undefined. If you face any problems and you know what's going * on (you know something about the card and you can interpret some * hex LANCE register output) then define SK_DEBUG * */#undef SK_DEBUG /* debugging */#undef SK_DEBUG2 /* debugging with more verbose report */#ifdef SK_DEBUG#define PRINTK(x) printk x#else#define PRINTK(x) /**/#endif#ifdef SK_DEBUG2#define PRINTK2(x) printk x#else#define PRINTK2(x) /**/#endif/* * SK_G16 RAM * * The components are memory mapped and can be set in a region from * 0x00000 through 0xfc000 in 16KB steps. * * The Network components are: dual ported RAM, Prom, I/O Reg, Status-, * Controlregister and I/O Command. * * dual ported RAM: This is the only memory region which the LANCE chip * has access to. From the Lance it is addressed from 0x0000 to * 0x3fbf. The host accesses it normally. * * PROM: The PROM obtains the ETHERNET-MAC-Address. It is realised as a * 8-Bit PROM, this means only the 16 even addresses are used of the * 32 Byte Address region. Access to an odd address results in invalid * data. * * LANCE I/O Reg: The I/O Reg is build of 4 single Registers, Low-Byte Write, * Hi-Byte Write, Low-Byte Read, Hi-Byte Read. * Transfer from or to the LANCE is always in 16Bit so Low and High * registers are always relevant. * * The Data from the Readregister is not the data in the Writeregister!! * * Port: Status- and Controlregister. * Two different registers which share the same address, Status is * read-only, Control is write-only. * * I/O Command: * Any bitcombination written in here starts the transmission between * Host and LANCE. */typedef struct{ unsigned char ram[0x3fc0]; /* 16KB dual ported ram */ unsigned char rom[0x0020]; /* 32Byte PROM containing 6Byte MAC */ unsigned char res1[0x0010]; /* reserved */ unsigned volatile short ioreg;/* LANCE I/O Register */ unsigned volatile char port; /* Statusregister and Controlregister */ unsigned char iocom; /* I/O Command Register */} SK_RAM;/* struct *//* * This is the structure for the dual ported ram. We * have exactly 16 320 Bytes. In here there must be: * * - Initialize Block (starting at a word boundary) * - Receive and Transmit Descriptor Rings (quadword boundary) * - Data Buffers (arbitrary boundary) * * This is because LANCE has on SK_G16 only access to the dual ported * RAM and nowhere else. */struct SK_ram{ struct init_block ib; struct tmd tmde[TMDNUM]; struct rmd rmde[RMDNUM]; char tmdbuf[TMDNUM][PKT_BUF_SZ]; char rmdbuf[RMDNUM][PKT_BUF_SZ];};/* * Structure where all necessary information is for ring buffer * management and statistics. */struct priv{ struct SK_ram *ram; /* dual ported ram structure */ struct rmd *rmdhead; /* start of receive ring descriptors */ struct tmd *tmdhead; /* start of transmit ring descriptors */ int rmdnum; /* actual used ring descriptor */ int tmdnum; /* actual transmit descriptor for transmitting data */ int tmdlast; /* last sent descriptor used for error handling, etc */ void *rmdbufs[RMDNUM]; /* pointer to the receive buffers */ void *tmdbufs[TMDNUM]; /* pointer to the transmit buffers */ struct net_device_stats stats; /* Device driver statistics */};/* global variable declaration *//* IRQ map used to reserve a IRQ (see SK_open()) *//* static variables */static SK_RAM *board; /* pointer to our memory mapped board components */static struct net_device *SK_dev;unsigned long SK_ioaddr;static spinlock_t SK_lock = SPIN_LOCK_UNLOCKED;/* Macros */ /* Function Prototypes *//* * Device Driver functions * ----------------------- * See for short explanation of each function its definitions header. */int SK_init(struct net_device *dev);static int SK_probe(struct net_device *dev, short ioaddr);static void SK_timeout(struct net_device *dev);static int SK_open(struct net_device *dev);static int SK_send_packet(struct sk_buff *skb, struct net_device *dev);static void SK_interrupt(int irq, void *dev_id, struct pt_regs * regs);static void SK_rxintr(struct net_device *dev);static void SK_txintr(struct net_device *dev);static int SK_close(struct net_device *dev);static struct net_device_stats *SK_get_stats(struct net_device *dev);unsigned int SK_rom_addr(void);static void set_multicast_list(struct net_device *dev);/* * LANCE Functions * --------------- */static int SK_lance_init(struct net_device *dev, unsigned short mode);void SK_reset_board(void);void SK_set_RAP(int reg_number);int SK_read_reg(int reg_number);int SK_rread_reg(void);void SK_write_reg(int reg_number, int value);/* * Debugging functions * ------------------- */void SK_print_pos(struct net_device *dev, char *text);void SK_print_dev(struct net_device *dev, char *text);void SK_print_ram(struct net_device *dev); /*- * Function : SK_init * Author : Patrick J.D. Weichmann * Date Created : 94/05/26 * * Description : Check for a SK_G16 network adaptor and initialize it. * This function gets called by dev_init which initializes * all Network devices. * * Parameters : I : struct net_device *dev - structure preconfigured * from Space.c * Return Value : 0 = Driver Found and initialized * Errors : ENODEV - no device found * ENXIO - not probed * Globals : None * Update History :⌨️ 快捷键说明
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