fore200e.h

linux和2410结合开发 用他可以生成2410所需的zImage文件

typedef struct init_block {
    enum opcode  opcode;               /* initialize command             */
    enum status  status;	       /* related status word            */
    u32          receive_threshold;    /* not used                       */
    u32          num_connect;          /* ATM connections                */
    u32          cmd_queue_len;        /* length of command queue        */
    u32          tx_queue_len;         /* length of transmit queue       */
    u32          rx_queue_len;         /* length of receive queue        */
    u32          rsd_extension;        /* number of extra 32 byte blocks */
    u32          tsd_extension;        /* number of extra 32 byte blocks */
    u32          conless_vpvc;         /* not used                       */
    u32          pad[ 2 ];             /* force quad alignment           */
    struct bs_spec bs_spec[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ];      /* buffer supply queues spec */
} init_block_t;


typedef enum media_type {
    MEDIA_TYPE_CAT5_UTP  = 0x06,    /* unshielded twisted pair */
    MEDIA_TYPE_MM_OC3_ST = 0x16,    /* multimode fiber ST      */
    MEDIA_TYPE_MM_OC3_SC = 0x26,    /* multimode fiber SC      */
    MEDIA_TYPE_SM_OC3_ST = 0x36,    /* single-mode fiber ST    */
    MEDIA_TYPE_SM_OC3_SC = 0x46     /* single-mode fiber SC    */
} media_type_t;

#define FORE200E_MEDIA_INDEX(media_type)   ((media_type)>>4)


/* cp resident queues */

typedef struct cp_queues {
    u32	              cp_cmdq;         /* command queue                      */
    u32	              cp_txq;          /* transmit queue                     */
    u32	              cp_rxq;          /* receive queue                      */
    u32               cp_bsq[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ];        /* buffer supply queues */
    u32	              imask;             /* 1 enables cp to host interrupts  */
    u32	              istat;             /* 1 for interrupt posted           */
    u32	              heap_base;         /* offset form beginning of ram     */
    u32	              heap_size;         /* space available for queues       */
    u32	              hlogger;           /* non zero for host logging        */
    u32               heartbeat;         /* cp heartbeat                     */
    u32	              fw_release;        /* firmware version                 */
    u32	              mon960_release;    /* i960 monitor version             */
    u32	              tq_plen;           /* transmit throughput measurements */
    /* make sure the init block remains on a quad word boundary              */
    struct init_block init;              /* one time cmd, not in cmd queue   */
    enum   media_type media_type;        /* media type id                    */
    u32               oc3_revision;      /* OC-3 revision number             */
} cp_queues_t;


/* boot status */

typedef enum boot_status {
    BSTAT_COLD_START    = (u32) 0xc01dc01d,    /* cold start              */
    BSTAT_SELFTEST_OK   = (u32) 0x02201958,    /* self-test ok            */
    BSTAT_SELFTEST_FAIL = (u32) 0xadbadbad,    /* self-test failed        */
    BSTAT_CP_RUNNING    = (u32) 0xce11feed,    /* cp is running           */
    BSTAT_MON_TOO_BIG   = (u32) 0x10aded00     /* i960 monitor is too big */
} boot_status_t;


/* software UART */

typedef struct soft_uart {
    u32 send;    /* write register */
    u32 recv;    /* read register  */
} soft_uart_t;

#define FORE200E_CP_MONITOR_UART_FREE     0x00000000
#define FORE200E_CP_MONITOR_UART_AVAIL    0x01000000


/* i960 monitor */

typedef struct cp_monitor {
    struct soft_uart    soft_uart;      /* software UART           */
    enum boot_status	bstat;          /* boot status             */
    u32			app_base;       /* application base offset */
    u32			mon_version;    /* i960 monitor version    */
} cp_monitor_t;


/* device state */

typedef enum fore200e_state {
    FORE200E_STATE_BLANK,         /* initial state                     */
    FORE200E_STATE_REGISTER,      /* device registered                 */
    FORE200E_STATE_CONFIGURE,     /* bus interface configured          */
    FORE200E_STATE_MAP,           /* board space mapped in host memory */
    FORE200E_STATE_RESET,         /* board resetted                    */
    FORE200E_STATE_LOAD_FW,       /* firmware loaded                   */
    FORE200E_STATE_START_FW,      /* firmware started                  */
    FORE200E_STATE_INITIALIZE,    /* initialize command successful     */
    FORE200E_STATE_INIT_CMDQ,     /* command queue initialized         */
    FORE200E_STATE_INIT_TXQ,      /* transmit queue initialized        */
    FORE200E_STATE_INIT_RXQ,      /* receive queue initialized         */
    FORE200E_STATE_INIT_BSQ,      /* buffer supply queue initialized   */
    FORE200E_STATE_ALLOC_BUF,     /* receive buffers allocated         */
    FORE200E_STATE_IRQ,           /* host interrupt requested          */
    FORE200E_STATE_COMPLETE       /* initialization completed          */
} fore200e_state;


/* PCA-200E registers */

typedef struct fore200e_pca_regs {
    volatile u32* hcr;    /* address of host control register        */
    volatile u32* imr;    /* address of host interrupt mask register */
    volatile u32* psr;    /* address of PCI specific register        */
} fore200e_pca_regs_t;


/* SBA-200E registers */

typedef struct fore200e_sba_regs {
    volatile u32* hcr;    /* address of host control register              */
    volatile u32* bsr;    /* address of burst transfer size register       */
    volatile u32* isr;    /* address of interrupt level selection register */
} fore200e_sba_regs_t;


/* model-specific registers */

typedef union fore200e_regs {
    struct fore200e_pca_regs pca;    /* PCA-200E registers */
    struct fore200e_sba_regs sba;    /* SBA-200E registers */
} fore200e_regs;


struct fore200e;

/* bus-dependent data */

typedef struct fore200e_bus {
    char*                model_name;          /* board model name                       */
    char*                proc_name;           /* board name under /proc/atm             */
    int                  descr_alignment;     /* tpd/rpd/rbd DMA alignment requirement  */
    int                  buffer_alignment;    /* rx buffers DMA alignment requirement   */
    int                  status_alignment;    /* status words DMA alignment requirement */
    const unsigned char* fw_data;             /* address of firmware data start         */
    const unsigned int*  fw_size;             /* address of firmware data size          */
    u32                  (*read)(volatile u32*);
    void                 (*write)(u32, volatile u32*);
    u32                  (*dma_map)(struct fore200e*, void*, int, int);
    void                 (*dma_unmap)(struct fore200e*, u32, int, int);
    void                 (*dma_sync)(struct fore200e*, u32, int, int);
    int                  (*dma_chunk_alloc)(struct fore200e*, struct chunk*, int, int, int);
    void                 (*dma_chunk_free)(struct fore200e*, struct chunk*);
    struct fore200e*     (*detect)(const struct fore200e_bus*, int);
    int                  (*configure)(struct fore200e*); 
    int                  (*map)(struct fore200e*); 
    void                 (*reset)(struct fore200e*);
    int                  (*prom_read)(struct fore200e*, struct prom_data*);
    void                 (*unmap)(struct fore200e*);
    void                 (*irq_enable)(struct fore200e*);
    int                  (*irq_check)(struct fore200e*);
    void                 (*irq_ack)(struct fore200e*);
    int                  (*proc_read)(struct fore200e*, char*);
} fore200e_bus_t;


#if defined(CONFIG_ATM_FORE200E_SBA)
#  if defined(CONFIG_ATM_FORE200E_PCA)
#    if (PCI_DMA_BIDIRECTIONAL == SBUS_DMA_BIDIRECTIONAL) && \
        (PCI_DMA_TODEVICE      == SBUS_DMA_TODEVICE)      && \
        (PCI_DMA_FROMDEVICE    == SBUS_DMA_FROMDEVICE)
#      define FORE200E_DMA_BIDIRECTIONAL PCI_DMA_BIDIRECTIONAL
#      define FORE200E_DMA_TODEVICE      PCI_DMA_TODEVICE
#      define FORE200E_DMA_FROMDEVICE    PCI_DMA_FROMDEVICE
#    else
       /* in that case, we'll need to add an extra indirection, e.g.
	  fore200e->bus->dma_direction[ fore200e_dma_direction ] */
#      error PCI and SBUS DMA direction flags have different values!
#    endif
#  else
#    define FORE200E_DMA_BIDIRECTIONAL SBUS_DMA_BIDIRECTIONAL
#    define FORE200E_DMA_TODEVICE      SBUS_DMA_TODEVICE
#    define FORE200E_DMA_FROMDEVICE    SBUS_DMA_FROMDEVICE
#  endif
#else
#  ifndef CONFIG_ATM_FORE200E_PCA
#    warning compiling the fore200e driver without any hardware support enabled!
#    include <linux/pci.h>
#  endif
#  define FORE200E_DMA_BIDIRECTIONAL PCI_DMA_BIDIRECTIONAL
#  define FORE200E_DMA_TODEVICE      PCI_DMA_TODEVICE
#  define FORE200E_DMA_FROMDEVICE    PCI_DMA_FROMDEVICE
#endif


/* per-device data */

typedef struct fore200e {
    struct       fore200e*     next;                   /* next device                        */
    const struct fore200e_bus* bus;                    /* bus-dependent code and data        */
    union        fore200e_regs regs;                   /* bus-dependent registers            */
    struct       atm_dev*      atm_dev;                /* ATM device                         */

    enum fore200e_state        state;                  /* device state                       */

    char                       name[16];               /* device name                        */
    void*                      bus_dev;                /* bus-specific kernel data           */
    int                        irq;                    /* irq number                         */
    unsigned long              phys_base;              /* physical base address              */
    void*                      virt_base;              /* virtual base address               */
    
    unsigned char              esi[ ESI_LEN ];         /* end system identifier              */

    struct cp_monitor*         cp_monitor;             /* i960 monitor address               */
    struct cp_queues*          cp_queues;              /* cp resident queues                 */
    struct host_cmdq           host_cmdq;              /* host resident cmd queue            */
    struct host_txq            host_txq;               /* host resident tx queue             */
    struct host_rxq            host_rxq;               /* host resident rx queue             */
                                                       /* host resident buffer supply queues */
    struct host_bsq            host_bsq[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ];       

    u32                        available_cell_rate;    /* remaining pseudo-CBR bw on link    */

    int                        loop_mode;              /* S/UNI loopback mode                */

    struct stats*              stats;                  /* last snapshot of the stats         */
    
    struct semaphore           rate_sf;                /* protects rate reservation ops      */
    struct tasklet_struct      tasklet;                /* performs interrupt work            */

} fore200e_t;


/* per-vcc data */

typedef struct fore200e_vcc {
    enum buffer_scheme scheme;        /* rx buffer scheme                   */
    struct tpd_rate    rate;          /* tx rate control data               */
    int                rx_min_pdu;    /* size of smallest PDU received      */
    int                rx_max_pdu;    /* size of largest PDU received       */
    int                tx_min_pdu;    /* size of smallest PDU transmitted   */
    int                tx_max_pdu;    /* size of largest PDU transmitted    */
} fore200e_vcc_t;



/* 200E-series common memory layout */

#define FORE200E_CP_MONITOR_OFFSET	0x00000400    /* i960 monitor interface */
#define FORE200E_CP_QUEUES_OFFSET	0x00004d40    /* cp resident queues     */


/* PCA-200E memory layout */

#define PCA200E_IOSPACE_LENGTH	        0x00200000

#define PCA200E_HCR_OFFSET		0x00100000    /* board control register */
#define PCA200E_IMR_OFFSET		0x00100004    /* host IRQ mask register */
#define PCA200E_PSR_OFFSET		0x00100008    /* PCI specific register  */


/* PCA-200E host control register */

#define PCA200E_HCR_RESET     (1<<0)    /* read / write */
#define PCA200E_HCR_HOLD_LOCK (1<<1)    /* read / write */
#define PCA200E_HCR_I960FAIL  (1<<2)    /* read         */
#define PCA200E_HCR_INTRB     (1<<2)    /* write        */
#define PCA200E_HCR_HOLD_ACK  (1<<3)    /* read         */
#define PCA200E_HCR_INTRA     (1<<3)    /* write        */
#define PCA200E_HCR_OUTFULL   (1<<4)    /* read         */
#define PCA200E_HCR_CLRINTR   (1<<4)    /* write        */
#define PCA200E_HCR_ESPHOLD   (1<<5)    /* read         */
#define PCA200E_HCR_INFULL    (1<<6)    /* read         */
#define PCA200E_HCR_TESTMODE  (1<<7)    /* read         */


/* PCA-200E PCI bus interface regs (offsets in PCI config space) */

#define PCA200E_PCI_LATENCY      0x40    /* maximum slave latenty            */
#define PCA200E_PCI_MASTER_CTRL  0x41    /* master control                   */
#define PCA200E_PCI_THRESHOLD    0x42    /* burst / continous req threshold  */

/* PBI master control register */

#define PCA200E_CTRL_DIS_CACHE_RD      (1<<0)    /* disable cache-line reads                         */
#define PCA200E_CTRL_DIS_WRT_INVAL     (1<<1)    /* disable writes and invalidates                   */
#define PCA200E_CTRL_2_CACHE_WRT_INVAL (1<<2)    /* require 2 cache-lines for writes and invalidates */
#define PCA200E_CTRL_IGN_LAT_TIMER     (1<<3)    /* ignore the latency timer                         */
#define PCA200E_CTRL_ENA_CONT_REQ_MODE (1<<4)    /* enable continuous request mode                   */
#define PCA200E_CTRL_LARGE_PCI_BURSTS  (1<<5)    /* force large PCI bus bursts                       */
#define PCA200E_CTRL_CONVERT_ENDIAN    (1<<6)    /* convert endianess of slave RAM accesses          */



#define SBA200E_PROM_NAME  "FORE,sba-200e"    /* device name in openprom tree */


/* size of SBA-200E registers */

#define SBA200E_HCR_LENGTH        4
#define SBA200E_BSR_LENGTH        4
#define SBA200E_ISR_LENGTH        4
#define SBA200E_RAM_LENGTH  0x40000


/* SBA-200E SBUS burst transfer size register */

#define SBA200E_BSR_BURST4   0x04
#define SBA200E_BSR_BURST8   0x08
#define SBA200E_BSR_BURST16  0x10


/* SBA-200E host control register */

#define SBA200E_HCR_RESET        (1<<0)    /* read / write (sticky) */
#define SBA200E_HCR_HOLD_LOCK    (1<<1)    /* read / write (sticky) */
#define SBA200E_HCR_I960FAIL     (1<<2)    /* read                  */
#define SBA200E_HCR_I960SETINTR  (1<<2)    /* write                 */
#define SBA200E_HCR_OUTFULL      (1<<3)    /* read                  */
#define SBA200E_HCR_INTR_CLR     (1<<3)    /* write                 */
#define SBA200E_HCR_INTR_ENA     (1<<4)    /* read / write (sticky) */
#define SBA200E_HCR_ESPHOLD      (1<<5)    /* read                  */
#define SBA200E_HCR_INFULL       (1<<6)    /* read                  */
#define SBA200E_HCR_TESTMODE     (1<<7)    /* read                  */
#define SBA200E_HCR_INTR_REQ     (1<<8)    /* read                  */

#define SBA200E_HCR_STICKY       (SBA200E_HCR_RESET | SBA200E_HCR_HOLD_LOCK | SBA200E_HCR_INTR_ENA)


#endif /* __KERNEL__ */
#endif /* _FORE200E_H */