inia100.h

linux和2410结合开发 用他可以生成2410所需的zImage文件

#define ORC_HSTUS	0xA6	/* Host Status                    */
#define HDI			0x02	/* Host data in                   */
#define RREADY		0x01	/* RISC engine is ready to receive */
#define	ORC_NVRAM	0xA7	/* Nvram port address             */
#define SE2CS		0x008
#define SE2CLK		0x004
#define SE2DO		0x002
#define SE2DI		0x001
#define ORC_PQUEUE	0xA8	/* Posting queue FIFO             */
#define ORC_PQCNT	0xA9	/* Posting queue FIFO Cnt */
#define ORC_RQUEUE	0xAA	/* Reply queue FIFO               */
#define ORC_RQUEUECNT	0xAB	/* Reply queue FIFO Cnt           */
#define	ORC_FWBASEADR	0xAC	/* Firmware base address  */

#define	ORC_EBIOSADR0 0xB0	/* External Bios address */
#define	ORC_EBIOSADR1 0xB1	/* External Bios address */
#define	ORC_EBIOSADR2 0xB2	/* External Bios address */
#define	ORC_EBIOSDATA 0xB3	/* External Bios address */

#define	ORC_SCBSIZE	0xB7	/* SCB size register              */
#define	ORC_SCBBASE0	0xB8	/* SCB base address 0             */
#define	ORC_SCBBASE1	0xBC	/* SCB base address 1             */

#define	ORC_RISCCTL	0xE0	/* RISC Control                   */
#define PRGMRST		0x002
#define DOWNLOAD		0x001
#define	ORC_PRGMCTR0	0xE2	/* RISC program counter           */
#define	ORC_PRGMCTR1	0xE3	/* RISC program counter           */
#define	ORC_RISCRAM	0xEC	/* RISC RAM data port 4 bytes     */

typedef struct orc_extended_scb {	/* Extended SCB                 */
	ORC_SG ESCB_SGList[TOTAL_SG_ENTRY];	/*0 Start of SG list              */
	Scsi_Cmnd *SCB_Srb;	/*50 SRB Pointer */
} ESCB;

/***********************************************************************
		SCSI Control Block
************************************************************************/
typedef struct orc_scb {	/* Scsi_Ctrl_Blk                */
	UBYTE SCB_Opcode;	/*00 SCB command code&residual  */
	UBYTE SCB_Flags;	/*01 SCB Flags                  */
	UBYTE SCB_Target;	/*02 Target Id                  */
	UBYTE SCB_Lun;		/*03 Lun                        */
	U32 SCB_Reserved0;	/*04 Reserved for ORCHID must 0 */
	U32 SCB_XferLen;	/*08 Data Transfer Length       */
	U32 SCB_Reserved1;	/*0C Reserved for ORCHID must 0 */
	U32 SCB_SGLen;		/*10 SG list # * 8              */
	U32 SCB_SGPAddr;	/*14 SG List Buf physical Addr  */
	U32 SCB_SGPAddrHigh;	/*18 SG Buffer high physical Addr */
	UBYTE SCB_HaStat;	/*1C Host Status                */
	UBYTE SCB_TaStat;	/*1D Target Status              */
	UBYTE SCB_Status;	/*1E SCB status                 */
	UBYTE SCB_Link;		/*1F Link pointer, default 0xFF */
	UBYTE SCB_SenseLen;	/*20 Sense Allocation Length    */
	UBYTE SCB_CDBLen;	/*21 CDB Length                 */
	UBYTE SCB_Ident;	/*22 Identify                   */
	UBYTE SCB_TagMsg;	/*23 Tag Message                */
	UBYTE SCB_CDB[IMAX_CDB];	/*24 SCSI CDBs                  */
	UBYTE SCB_ScbIdx;	/*3C Index for this ORCSCB      */
	U32 SCB_SensePAddr;	/*34 Sense Buffer physical Addr */

	ESCB *SCB_EScb;		/*38 Extended SCB Pointer       */
#ifndef ALPHA
	UBYTE SCB_Reserved2[4];	/*3E Reserved for Driver use    */
#endif
} ORC_SCB;

/* Opcodes of ORCSCB_Opcode */
#define ORC_EXECSCSI	0x00	/* SCSI initiator command with residual */
#define ORC_BUSDEVRST	0x01	/* SCSI Bus Device Reset  */

/* Status of ORCSCB_Status */
#define ORCSCB_COMPLETE	0x00	/* SCB request completed  */
#define ORCSCB_POST	0x01	/* SCB is posted by the HOST      */

/* Bit Definition for ORCSCB_Flags */
#define SCF_DISINT	0x01	/* Disable HOST interrupt */
#define SCF_DIR		0x18	/* Direction bits         */
#define SCF_NO_DCHK	0x00	/* Direction determined by SCSI   */
#define SCF_DIN		0x08	/* From Target to Initiator       */
#define SCF_DOUT	0x10	/* From Initiator to Target       */
#define SCF_NO_XF	0x18	/* No data transfer               */
#define SCF_POLL   0x40

/* Error Codes for ORCSCB_HaStat */
#define HOST_SEL_TOUT	0x11
#define HOST_DO_DU	0x12
#define HOST_BUS_FREE	0x13
#define HOST_BAD_PHAS	0x14
#define HOST_INV_CMD	0x16
#define HOST_SCSI_RST	0x1B
#define HOST_DEV_RST	0x1C


/* Error Codes for ORCSCB_TaStat */
#define TARGET_CHK_COND	0x02
#define TARGET_BUSY	0x08
#define TARGET_TAG_FULL	0x28


/* Queue tag msg: Simple_quque_tag, Head_of_queue_tag, Ordered_queue_tag */
#define MSG_STAG	0x20
#define MSG_HTAG	0x21
#define MSG_OTAG	0x22

#define MSG_IGNOREWIDE	0x23

#define MSG_IDENT	0x80
#define MSG_DISC	0x40	/* Disconnect allowed             */


/* SCSI MESSAGE */
#define	MSG_EXTEND	0x01
#define	MSG_SDP		0x02
#define	MSG_ABORT	0x06
#define	MSG_REJ		0x07
#define	MSG_NOP		0x08
#define	MSG_PARITY	0x09
#define	MSG_DEVRST	0x0C
#define	MSG_STAG	0x20

/***********************************************************************
		Target Device Control Structure
**********************************************************************/

typedef struct ORC_Tar_Ctrl_Struc {
	UBYTE TCS_DrvDASD;	/* 6 */
	UBYTE TCS_DrvSCSI;	/* 7 */
	UBYTE TCS_DrvHead;	/* 8 */
	UWORD TCS_DrvFlags;	/* 4 */
	UBYTE TCS_DrvSector;	/* 7 */
} ORC_TCS, *PORC_TCS;

/* Bit Definition for TCF_DrvFlags */
#define	TCS_DF_NODASD_SUPT	0x20	/* Suppress OS/2 DASD Mgr support */
#define	TCS_DF_NOSCSI_SUPT	0x40	/* Suppress OS/2 SCSI Mgr support */


/***********************************************************************
              Host Adapter Control Structure
************************************************************************/
typedef struct ORC_Ha_Ctrl_Struc {
	USHORT HCS_Base;	/* 00 */
	UBYTE HCS_Index;	/* 02 */
	UBYTE HCS_Intr;		/* 04 */
	UBYTE HCS_SCSI_ID;	/* 06    H/A SCSI ID */
	UBYTE HCS_BIOS;		/* 07    BIOS configuration */

	UBYTE HCS_Flags;	/* 0B */
	UBYTE HCS_HAConfig1;	/* 1B    SCSI0MAXTags */
	UBYTE HCS_MaxTar;	/* 1B    SCSI0MAXTags */

	USHORT HCS_Units;	/* Number of units this adapter  */
	USHORT HCS_AFlags;	/* Adapter info. defined flags   */
	ULONG HCS_Timeout;	/* Adapter timeout value   */
	PVOID HCS_virScbArray;	/* 28 Virtual Pointer to SCB array     */
	U32 HCS_physScbArray;	/* Scb Physical address */
	PVOID HCS_virEscbArray;	/* Virtual pointer to ESCB Scatter list */
	U32 HCS_physEscbArray;	/* scatter list Physical address */
	UBYTE TargetFlag[16];	/* 30  target configuration, TCF_EN_TAG */
	UBYTE MaximumTags[16];	/* 40  ORC_MAX_SCBS */
	UBYTE ActiveTags[16][16];	/* 50 */
	ORC_TCS HCS_Tcs[16];	/* 28 */
	U32 BitAllocFlag[MAX_CHANNELS][8];	/* Max STB is 256, So 256/32 */
	spinlock_t BitAllocFlagLock;
	Scsi_Cmnd *pSRB_head;
	Scsi_Cmnd *pSRB_tail;
	spinlock_t pSRB_lock;
} ORC_HCS;

/* Bit Definition for HCS_Flags */

#define HCF_SCSI_RESET	0x01	/* SCSI BUS RESET         */
#define HCF_PARITY    	0x02	/* parity card                    */
#define HCF_LVDS     	0x10	/* parity card                    */

/* Bit Definition for TargetFlag */

#define TCF_EN_255	    0x08
#define TCF_EN_TAG	    0x10
#define TCF_BUSY	      0x20
#define TCF_DISCONNECT	0x40
#define TCF_SPIN_UP	  0x80

/* Bit Definition for HCS_AFlags */
#define	HCS_AF_IGNORE		0x01	/* Adapter ignore         */
#define	HCS_AF_DISABLE_RESET	0x10	/* Adapter disable reset  */
#define	HCS_AF_DISABLE_ADPT	0x80	/* Adapter disable                */


/*---------------------------------------*/
/* TimeOut for RESET to complete (30s)   */
/*                                       */
/* After a RESET the drive is checked    */
/* every 200ms.                          */
/*---------------------------------------*/
#define DELAYED_RESET_MAX       (30*1000L)
#define DELAYED_RESET_INTERVAL  200L

/*----------------------------------------------*/
/* TimeOut for IRQ from last interrupt (5s)     */
/*----------------------------------------------*/
#define IRQ_TIMEOUT_INTERVAL    (5*1000L)

/*----------------------------------------------*/
/* Retry Delay interval (200ms)                 */
/*----------------------------------------------*/
#define DELAYED_RETRY_INTERVAL  200L

#define	INQUIRY_SIZE		36
#define	CAPACITY_SIZE		8
#define	DEFAULT_SENSE_LEN	14

#define	DEVICE_NOT_FOUND	0x86

/*----------------------------------------------*/
/* Definition for PCI device                    */
/*----------------------------------------------*/
#define	MAX_PCI_DEVICES	21
#define	MAX_PCI_BUSES	8