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📄 sym53c8xx_defs.h

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/********************************************************************************  High Performance device driver for the Symbios 53C896 controller.****  Copyright (C) 1998-2001  Gerard Roudier <groudier@free.fr>****  This driver also supports all the Symbios 53C8XX controller family, **  except 53C810 revisions < 16, 53C825 revisions < 16 and all **  revisions of 53C815 controllers.****  This driver is based on the Linux port of the FreeBSD ncr driver.** **  Copyright (C) 1994  Wolfgang Stanglmeier**  **-----------------------------------------------------------------------------**  **  This program is free software; you can redistribute it and/or modify**  it under the terms of the GNU General Public License as published by**  the Free Software Foundation; either version 2 of the License, or**  (at your option) any later version.****  This program is distributed in the hope that it will be useful,**  but WITHOUT ANY WARRANTY; without even the implied warranty of**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the**  GNU General Public License for more details.****  You should have received a copy of the GNU General Public License**  along with this program; if not, write to the Free Software**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.****-----------------------------------------------------------------------------****  The Linux port of the FreeBSD ncr driver has been achieved in **  november 1995 by:****          Gerard Roudier              <groudier@free.fr>****  Being given that this driver originates from the FreeBSD version, and**  in order to keep synergy on both, any suggested enhancements and corrections**  received on Linux are automatically a potential candidate for the FreeBSD **  version.****  The original driver has been written for 386bsd and FreeBSD by**          Wolfgang Stanglmeier        <wolf@cologne.de>**          Stefan Esser                <se@mi.Uni-Koeln.de>****-----------------------------------------------------------------------------****  Major contributions:**  --------------------****  NVRAM detection and reading.**    Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>**********************************************************************************/#ifndef SYM53C8XX_DEFS_H#define SYM53C8XX_DEFS_H/***	Check supported Linux versions*/#if !defined(LINUX_VERSION_CODE)#include <linux/version.h>#endif#include <linux/config.h>#define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))/* * NCR PQS/PDS special device support. */#ifdef CONFIG_SCSI_NCR53C8XX_PQS_PDS#define SCSI_NCR_PQS_PDS_SUPPORT#endif/* *	No more an option, enabled by default. */#ifndef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT#define CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT#endif/***	These options are not tunable from 'make config'*/#define	SCSI_NCR_PROC_INFO_SUPPORT/***	If you want a driver as small as possible, donnot define the **	following options.*/#define SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT#define SCSI_NCR_DEBUG_INFO_SUPPORT#define SCSI_NCR_PCI_FIX_UP_SUPPORT#ifdef	SCSI_NCR_PROC_INFO_SUPPORT#	define	SCSI_NCR_USER_COMMAND_SUPPORT#	define	SCSI_NCR_USER_INFO_SUPPORT#endif/***	To disable integrity checking, do not define the **	following option.*/#ifdef	CONFIG_SCSI_NCR53C8XX_INTEGRITY_CHECK#	define SCSI_NCR_ENABLE_INTEGRITY_CHECK#endif/*==========================================================**** nvram settings - #define SCSI_NCR_NVRAM_SUPPORT to enable****==========================================================*/#ifdef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT#define SCSI_NCR_NVRAM_SUPPORT/* #define SCSI_NCR_DEBUG_NVRAM */#endif/* ---------------------------------------------------------------------** Take into account kernel configured parameters.** Most of these options can be overridden at startup by a command line.** ---------------------------------------------------------------------*//* * For Ultra2 and Ultra3 SCSI support option, use special features.  * * Value (default) means: *	bit 0 : all features enabled, except: *		bit 1 : PCI Write And Invalidate. *		bit 2 : Data Phase Mismatch handling from SCRIPTS. * * Use boot options ncr53c8xx=specf:1 if you want all chip features to be  * enabled by the driver. */#define	SCSI_NCR_SETUP_SPECIAL_FEATURES		(3)#define SCSI_NCR_MAX_SYNC			(80)/* * Allow tags from 2 to 256, default 8 */#ifdef	CONFIG_SCSI_NCR53C8XX_MAX_TAGS#if	CONFIG_SCSI_NCR53C8XX_MAX_TAGS < 2#define SCSI_NCR_MAX_TAGS	(2)#elif	CONFIG_SCSI_NCR53C8XX_MAX_TAGS > 256#define SCSI_NCR_MAX_TAGS	(256)#else#define	SCSI_NCR_MAX_TAGS	CONFIG_SCSI_NCR53C8XX_MAX_TAGS#endif#else#define SCSI_NCR_MAX_TAGS	(8)#endif/* * Allow tagged command queuing support if configured with default number  * of tags set to max (see above). */#ifdef	CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS#define	SCSI_NCR_SETUP_DEFAULT_TAGS	CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS#elif	defined CONFIG_SCSI_NCR53C8XX_TAGGED_QUEUE#define	SCSI_NCR_SETUP_DEFAULT_TAGS	SCSI_NCR_MAX_TAGS#else#define	SCSI_NCR_SETUP_DEFAULT_TAGS	(0)#endif/* * Use normal IO if configured. Forced for alpha. */#if defined(CONFIG_SCSI_NCR53C8XX_IOMAPPED)#define	SCSI_NCR_IOMAPPED#elif defined(__alpha__)#define	SCSI_NCR_IOMAPPED#elif defined(__powerpc__)#if LINUX_VERSION_CODE <= LinuxVersionCode(2,4,3)#define	SCSI_NCR_IOMAPPED#define SCSI_NCR_PCI_MEM_NOT_SUPPORTED#endif#elif defined(__sparc__)#undef SCSI_NCR_IOMAPPED#endif/* * Immediate arbitration */#if defined(CONFIG_SCSI_NCR53C8XX_IARB)#define SCSI_NCR_IARB_SUPPORT#endif/* * Sync transfer frequency at startup. * Allow from 5Mhz to 80Mhz default 20 Mhz. */#ifndef	CONFIG_SCSI_NCR53C8XX_SYNC#define	CONFIG_SCSI_NCR53C8XX_SYNC	(20)#elif	CONFIG_SCSI_NCR53C8XX_SYNC > SCSI_NCR_MAX_SYNC#undef	CONFIG_SCSI_NCR53C8XX_SYNC#define	CONFIG_SCSI_NCR53C8XX_SYNC	SCSI_NCR_MAX_SYNC#endif#if	CONFIG_SCSI_NCR53C8XX_SYNC == 0#define	SCSI_NCR_SETUP_DEFAULT_SYNC	(255)#elif	CONFIG_SCSI_NCR53C8XX_SYNC <= 5#define	SCSI_NCR_SETUP_DEFAULT_SYNC	(50)#elif	CONFIG_SCSI_NCR53C8XX_SYNC <= 20#define	SCSI_NCR_SETUP_DEFAULT_SYNC	(250/(CONFIG_SCSI_NCR53C8XX_SYNC))#elif	CONFIG_SCSI_NCR53C8XX_SYNC <= 33#define	SCSI_NCR_SETUP_DEFAULT_SYNC	(11)#elif	CONFIG_SCSI_NCR53C8XX_SYNC <= 40#define	SCSI_NCR_SETUP_DEFAULT_SYNC	(10)#else#define	SCSI_NCR_SETUP_DEFAULT_SYNC 	(9)#endif/* * Disallow disconnections at boot-up */#ifdef CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT#define SCSI_NCR_SETUP_DISCONNECTION	(0)#else#define SCSI_NCR_SETUP_DISCONNECTION	(1)#endif/* * Force synchronous negotiation for all targets */#ifdef CONFIG_SCSI_NCR53C8XX_FORCE_SYNC_NEGO#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO	(1)#else#define SCSI_NCR_SETUP_FORCE_SYNC_NEGO	(0)#endif/* * Disable master parity checking (flawed hardwares need that) */#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_MPARITY_CHECK#define SCSI_NCR_SETUP_MASTER_PARITY	(0)#else#define SCSI_NCR_SETUP_MASTER_PARITY	(1)#endif/* * Disable scsi parity checking (flawed devices may need that) */#ifdef CONFIG_SCSI_NCR53C8XX_DISABLE_PARITY_CHECK#define SCSI_NCR_SETUP_SCSI_PARITY	(0)#else#define SCSI_NCR_SETUP_SCSI_PARITY	(1)#endif/* * Vendor specific stuff */#ifdef CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT#define SCSI_NCR_SETUP_LED_PIN		(1)#define SCSI_NCR_SETUP_DIFF_SUPPORT	(4)#else#define SCSI_NCR_SETUP_LED_PIN		(0)#define SCSI_NCR_SETUP_DIFF_SUPPORT	(0)#endif/* * Settle time after reset at boot-up */#define SCSI_NCR_SETUP_SETTLE_TIME	(2)/***	Bridge quirks work-around option defaulted to 1.*/#ifndef	SCSI_NCR_PCIQ_WORK_AROUND_OPT#define	SCSI_NCR_PCIQ_WORK_AROUND_OPT	1#endif/***	Work-around common bridge misbehaviour.****	- Do not flush posted writes in the opposite **	  direction on read.**	- May reorder DMA writes to memory.****	This option should not affect performances **	significantly, so it is the default.*/#if	SCSI_NCR_PCIQ_WORK_AROUND_OPT == 1#define	SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM#define	SCSI_NCR_PCIQ_MAY_REORDER_WRITES#define	SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS/***	Same as option 1, but also deal with **	misconfigured interrupts.****	- Edge triggerred instead of level sensitive.**	- No interrupt line connected.**	- IRQ number misconfigured.**	**	If no interrupt is delivered, the driver will **	catch the interrupt conditions 10 times per **	second. No need to say that this option is **	not recommended.*/#elif	SCSI_NCR_PCIQ_WORK_AROUND_OPT == 2#define	SCSI_NCR_PCIQ_MAY_NOT_FLUSH_PW_UPSTREAM#define	SCSI_NCR_PCIQ_MAY_REORDER_WRITES#define	SCSI_NCR_PCIQ_MAY_MISS_COMPLETIONS#define	SCSI_NCR_PCIQ_BROKEN_INTR/***	Some bridge designers decided to flush **	everything prior to deliver the interrupt.**	This option tries to deal with such a **	behaviour.*/#elif	SCSI_NCR_PCIQ_WORK_AROUND_OPT == 3#define	SCSI_NCR_PCIQ_SYNC_ON_INTR#endif/***	Other parameters not configurable with "make config"**	Avoid to change these constants, unless you know what you are doing.*/#define SCSI_NCR_ALWAYS_SIMPLE_TAG#define SCSI_NCR_MAX_SCATTER	(127)#define SCSI_NCR_MAX_TARGET	(16)/***   Compute some desirable value for CAN_QUEUE **   and CMD_PER_LUN.**   The driver will use lower values if these **   ones appear to be too large.*/#define SCSI_NCR_CAN_QUEUE	(8*SCSI_NCR_MAX_TAGS + 2*SCSI_NCR_MAX_TARGET)#define SCSI_NCR_CMD_PER_LUN	(SCSI_NCR_MAX_TAGS)#define SCSI_NCR_SG_TABLESIZE	(SCSI_NCR_MAX_SCATTER)#define SCSI_NCR_TIMER_INTERVAL	(HZ)#if 1 /* defined CONFIG_SCSI_MULTI_LUN */#define SCSI_NCR_MAX_LUN	(16)#else#define SCSI_NCR_MAX_LUN	(1)#endif#ifndef HOSTS_C/***	These simple macros limit expression involving **	kernel time values (jiffies) to some that have **	chance not to be too much incorrect. :-)*/#define ktime_get(o)		(jiffies + (u_long) o)#define ktime_exp(b)		((long)(jiffies) - (long)(b) >= 0)#define ktime_dif(a, b)		((long)(a) - (long)(b))/* These ones are not used in this driver */#define ktime_add(a, o)		((a) + (u_long)(o))#define ktime_sub(a, o)		((a) - (u_long)(o))/* *  IO functions definition for big/little endian CPU support. *  For now, the NCR is only supported in little endian addressing mode,  */#ifdef	__BIG_ENDIAN#if	LINUX_VERSION_CODE < LinuxVersionCode(2,1,0)#error	"BIG ENDIAN byte ordering needs kernel version >= 2.1.0"#endif#define	inw_l2b		inw#define	inl_l2b		inl#define	outw_b2l	outw#define	outl_b2l	outl#define	readb_raw	readb#define	writeb_raw	writeb#if defined(__hppa__)#define	readw_l2b(a)	le16_to_cpu(readw(a))#define	readl_l2b(a)	le32_to_cpu(readl(a))#define	writew_b2l(v,a)	writew(cpu_to_le16(v),a)#define	writel_b2l(v,a)	writel(cpu_to_le32(v),a)#else	/* Other bid-endian */#define	readw_l2b	readw#define	readl_l2b	readl#define	writew_b2l	writew#define	writel_b2l	writel#endif#else	/* little endian */#define	inw_raw		inw#define	inl_raw		inl#define	outw_raw	outw#define	outl_raw	outl#if defined(__i386__)	/* i386 implements full FLAT memory/MMIO model */#define readb_raw(a)	(*(volatile unsigned char *) (a))#define readw_raw(a)	(*(volatile unsigned short *) (a))#define readl_raw(a)	(*(volatile unsigned int *) (a))#define writeb_raw(b,a)	((*(volatile unsigned char *) (a)) = (b))#define writew_raw(b,a)	((*(volatile unsigned short *) (a)) = (b))#define writel_raw(b,a)	((*(volatile unsigned int *) (a)) = (b))#else	/* Other little-endian */#define	readb_raw	readb#define	readw_raw	readw#define	readl_raw	readl#define	writeb_raw	writeb#define	writew_raw	writew#define	writel_raw	writel#endif#endif#ifdef	SCSI_NCR_BIG_ENDIAN#error	"The NCR in BIG ENDIAN addressing mode is not (yet) supported"#endif/* *  IA32 architecture does not reorder STORES and prevents *  LOADS from passing STORES. It is called `program order'  *  by Intel and allows device drivers to deal with memory  *  ordering by only ensuring that the code is not reordered   *  by the compiler when ordering is required. *  Other architectures implement a weaker ordering that  *  requires memory barriers (and also IO barriers when they  *  make sense) to be used. *  We want to be paranoid for ppc and ia64. :) */#if	defined(__i386__) || defined(__x86_64__)#define MEMORY_BARRIER()	do { ; } while(0)

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