iostm8a.h

cxstm8 编译器

/*	LINUART section
 */
volatile char LINUART_SR    @0x5240;	/* LINUART Status register */
volatile char LINUART_DR    @0x5241;	/* LINUART Data register */
volatile char LINUART_BRR1  @0x5242;	/* LINUART Baud Rate reg 1 */
volatile char LINUART_BRR2  @0x5243;	/* LINUART Baud Rate reg 2 */
volatile char LINUART_CR1   @0x5244;	/* LINUART Control reg 1 */
volatile char LINUART_CR2   @0x5245;	/* LINUART Control reg 2 */
volatile char LINUART_CR3   @0x5246;	/* LINUART Control reg 3 */
volatile char LINUART_CR4   @0x5247;	/* LINUART Control reg 4 */
volatile char LINUART_CR6   @0x5249;	/* LINUART Control reg 6 */

/*	TIMER 1 section
 */
volatile char TIM1_CR1      @0x5250;	/* Control register 1 */
volatile char TIM1_CR2      @0x5251;	/* Control register 2 */
volatile char TIM1_SMCR     @0x5252;	/* Slave Mode Control reg */
volatile char TIM1_ETR      @0x5253;	/* External Trigger reg */
volatile char TIM1_IER      @0x5254;	/* Interrupt Enable reg */
volatile char TIM1_SR1      @0x5255;	/* Status register 1 */
volatile char TIM1_SR2      @0x5256;	/* Status register 2 */
volatile char TIM1_EGR      @0x5257;	/* Event Generation reg */
volatile char TIM1_CCMR1    @0x5258;	/* Capture/Compare Mode reg 1 */
volatile char TIM1_CCMR2    @0x5259;	/* Capture/Compare Mode reg 2 */
volatile char TIM1_CCMR3    @0x525a;	/* Capture/Compare Mode reg 3 */
volatile char TIM1_CCMR4    @0x525b;	/* Capture/Compare Mode reg 4 */
volatile char TIM1_CCER1    @0x525c;	/* Capture/Compare Enable reg 1 */
volatile char TIM1_CCER2    @0x525d;	/* Capture/Compare Enable reg 2 */
volatile char TIM1_CNTRH    @0x525e;	/* Counter reg High */
volatile char TIM1_CNTRL    @0x525f;	/* Counter reg Low */
volatile char TIM1_PSCRH    @0x5260;	/* Prescaler reg High */
volatile char TIM1_PSCRL    @0x5261;	/* Prescaler reg Low */
volatile char TIM1_ARRH     @0x5262;	/* Auto-reload reg High */
volatile char TIM1_ARRL     @0x5263;	/* Auto-reload reg Low */
volatile char TIM1_RCR      @0x5264;	/* Repetition Counter reg */
volatile char TIM1_CCR1H    @0x5265;	/* Capture/Compare reg 1 High */
volatile char TIM1_CCR1L    @0x5266;	/* Capture/Compare reg 1 Low */
volatile char TIM1_CCR2H    @0x5267;	/* Capture/Compare reg 2 High */
volatile char TIM1_CCR2L    @0x5268;	/* Capture/Compare reg 2 Low */
volatile char TIM1_CCR3H    @0x5269;	/* Capture/Compare reg 3 High */
volatile char TIM1_CCR3L    @0x526a;	/* Capture/Compare reg 3 Low */
volatile char TIM1_CCR4H    @0x526b;	/* Capture/Compare reg 4 High */
volatile char TIM1_CCR4L    @0x526c;	/* Capture/Compare reg 4 Low */
volatile char TIM1_BKR      @0x526d;	/* Break register */
volatile char TIM1_DTR      @0x526e;	/* Dead Time register */
volatile char TIM1_OISR     @0x526f;	/* Output Idle State reg */

/*	TIMER 2 section
 */
volatile char TIM2_CR1      @0x5300;	/* Control register 1 */
volatile char TIM2_IER      @0x5301;	/* Interrupt Enable reg */
volatile char TIM2_SR1      @0x5302;	/* Status Register 1 */
volatile char TIM2_SR2      @0x5303;	/* Status Register 2 */
volatile char TIM2_EGR      @0x5304;	/* Event Generation reg */
volatile char TIM2_CCMR1    @0x5305;	/* Capture/Compare Mode reg 1 */
volatile char TIM2_CCMR2    @0x5306;	/* Capture/Compare Mode reg 2 */
volatile char TIM2_CCMR3    @0x5307;	/* Capture/Compare Mode reg 3 */
volatile char TIM2_CCER1    @0x5308;	/* Capture/Compare Enable reg 1 */
volatile char TIM2_CCER2    @0x5309;	/* Capture/Compare Enable reg 2 */
volatile char TIM2_CNTRH    @0x530a;	/* Counter reg High */
volatile char TIM2_CNTRL    @0x530b;	/* Counter reg Low */
volatile char TIM2_PSCR     @0x530c;	/* Prescaler register */
volatile char TIM2_ARRH     @0x530d;	/* Auto-reload reg High */
volatile char TIM2_ARRL     @0x530e;	/* Auto-reload reg Low */
volatile char TIM2_CCR1H    @0x530f;	/* Capture/Compare Reg 1 High */
volatile char TIM2_CCR1L    @0x5310;	/* Capture/Compare Reg 1 Low */
volatile char TIM2_CCR2H    @0x5311;	/* Capture/Compare Reg 2 High */
volatile char TIM2_CCR2L    @0x5312;	/* Capture/Compare Reg 2 Low */
volatile char TIM2_CCR3H    @0x5313;	/* Capture/Compare Reg 3 High */
volatile char TIM2_CCR3L    @0x5314;	/* Capture/Compare Reg 3 Low */

/*	TIMER 3 section
 */
volatile char TIM3_CR1      @0x5320;	/* Control register 1 */
volatile char TIM3_IER      @0x5321;	/* Interrupt Enable reg */
volatile char TIM3_SR1      @0x5322;	/* Status register 1 */
volatile char TIM3_SR2      @0x5323;	/* Status register 2 */
volatile char TIM3_EGR      @0x5324;	/* Event Generation reg */
volatile char TIM3_CCMR1    @0x5325;	/* Capture/Compare Mode reg 1 */
volatile char TIM3_CCMR2    @0x5326;	/* Capture/Compare Mode reg 2 */
volatile char TIM3_CCER1    @0x5327;	/* Capture/Compare Enable reg 1 */
volatile char TIM3_CNTRH    @0x5328;	/* Counter reg High */
volatile char TIM3_CNTRL    @0x5329;	/* Counter reg Low */
volatile char TIM3_PSCR     @0x532a;	/* Prescaler register */
volatile char TIM3_ARRH     @0x532b;	/* Auto-reload reg high */
volatile char TIM3_ARRL     @0x532c;	/* Auto-reload reg low */
volatile char TIM3_CCR1H    @0x532d;	/* Capture/Compare reg 1 High */
volatile char TIM3_CCR1L    @0x532e;	/* Capture/Compare reg 1 Low */
volatile char TIM3_CCR2H    @0x532f;	/* Capture/Compare reg 2 High */
volatile char TIM3_CCR2L    @0x5330;	/* Capture/Compare reg 2 Low */

/*	TIMER 4 section
 */
volatile char TIM4_CR1      @0x5340;	/* Control register 1 */
volatile char TIM4_IER      @0x5341;	/* Interrupt enable reg */
volatile char TIM4_SR       @0x5342;	/* Status register */
volatile char TIM4_EGR      @0x5343;	/* Event Generation reg */
volatile char TIM4_CNTR     @0x5344;	/* Counter register */
volatile char TIM4_PSCR     @0x5345;	/* Prescaler register */
volatile char TIM4_ARR      @0x5346;	/* Auto-reload register */

/*	ADC section
 */
volatile char ADC_CSR       @0x5400;	/* Control/Status reg */
volatile char ADC_CR1       @0x5401;	/* Configuration reg 1 */
volatile char ADC_CR2       @0x5402;	/* Configuration reg 2 */
volatile char ADC_CR3       @0x5403;	/* Configuration reg 3 */
volatile char ADC_DRH       @0x5404;	/* Data reg high */
volatile char ADC_DRL       @0x5405;	/* Data reg low */
volatile char ADC_TDRH      @0x5406;	/* Schmitt Trigger Disable reg high */
volatile char ADC_TDRL      @0x5407;	/* Schmitt Trigger Disable reg low */

/*	CAN section
 */
volatile char CAN_CMCR      @0x5420;	/* can master control reg */
volatile char CAN_MSR       @0x5421;	/* can master status reg */
volatile char CAN_TSR       @0x5422;	/* can transmit status reg */
volatile char CAN_TPR       @0x5423;	/* can transmit status reg */
volatile char CAN_RFR       @0x5424;	/* can transmit priority reg */
volatile char CAN_IER       @0x5425;	/* can interrupt enable reg */
volatile char CAN_DGR       @0x5426;	/* can diagnosis reg */
volatile char CAN_FPSR      @0x5427;	/* can page selection reg */
volatile char CAN_P0        @0x5428;	/* can paged 0 reg */
volatile char CAN_P1        @0x5429;	/* can paged 1 reg */
volatile char CAN_P2        @0x542a;	/* can paged 2 reg */
volatile char CAN_P3        @0x542b;	/* can paged 3 reg */
volatile char CAN_P4        @0x542c;	/* can paged 4 reg */
volatile char CAN_P5        @0x542d;	/* can paged 5 reg */
volatile char CAN_P6        @0x542e;	/* can paged 6 reg */
volatile char CAN_P7        @0x542f;	/* can paged 7 reg */
volatile char CAN_P8        @0x5430;	/* can paged 8 reg */
volatile char CAN_P9        @0x5431;	/* can paged 9 reg */
volatile char CAN_PA        @0x5432;	/* can paged A reg */
volatile char CAN_PB        @0x5433;	/* can paged B reg */
volatile char CAN_PC        @0x5434;	/* can paged C reg */
volatile char CAN_PD        @0x5435;	/* can paged D reg */
volatile char CAN_PE        @0x5436;	/* can paged E reg */
volatile char CAN_PF        @0x5437;	/* can paged F reg */

/*	CFG section
 */
volatile char CFG_GCR       @0x7f60;	/* Global Configuration register */

/*	ITC section
 */
volatile char ITC_SPR1      @0x7f70;	/* Interrupt Software Priority Reg 1 */
volatile char ITC_SPR2      @0x7f71;	/* Interrupt Software Priority Reg 2 */
volatile char ITC_SPR3      @0x7f72;	/* Interrupt Software Priority Reg 3 */
volatile char ITC_SPR4      @0x7f73;	/* Interrupt Software Priority Reg 4 */
volatile char ITC_SPR5      @0x7f74;	/* Interrupt Software Priority Reg 5 */
volatile char ITC_SPR6      @0x7f75;	/* Interrupt Software Priority Reg 6 */
volatile char ITC_SPR7      @0x7f76;	/* Interrupt Software Priority Reg 7 */

/*	SWIM section
 */
volatile char SWIM_CSR      @0x7f80;	/* SWIM Control Status Register */

/*	In-Circuit Debugging section 
 */                                            
volatile char DM_BK1RE      @0x7f90;	/* IC Debugging Breakpoint 1 ESB Reg */
volatile char DM_BK1RH      @0x7f91;	/* IC Debugging Breakpoint 1 High */
volatile char DM_BK1RL      @0x7f92;	/* IC Debugging Breakpoint 1 Low */
volatile char DM_BK2RE      @0x7f93;	/* IC Debugging Breakpoint 2 ESB Reg */
volatile char DM_BK2RH      @0x7f94;	/* IC Debugging Breakpoint 2 High */
volatile char DM_BK2RL      @0x7f95;	/* IC Debugging Breakpoint 2 Low */
volatile char DM_CR1        @0x7f96;	/* IC Debugging Control register 1 */
volatile char DM_CR2        @0x7f97;	/* IC Debugging Control register 2 */
volatile char DM_CSR1       @0x7f98;	/* IC Debugging Control/Status reg 1 */
volatile char DM_CSR2       @0x7f99;	/* IC Debugging Control/Status reg 2 */
volatile char DM_ENFCTR     @0x7f9a;	/* IC Debugging Function Enable Reg 2 */