os_cpu_a.s
来自「武汉创维特ARM7实验箱的全部源代码」· S 代码 · 共 396 行 · 第 1/2 页
S
396 行
@/*************************************************************************/
@/* */
@/* FILE VERSION */
@/* */
@/* os_cpu_a.s S3C44B0X 1.00 */
@/* */
@/* Project name: EB44B0(S3C44B0X) Main board */
@/* Description : Functions defined in this module */
@/* */
@/* */
@/* void ARMDisableInt(void) --- disable interrupts when in SVC */
@/* void ARMEnableInt(void) --- enable interrupts when in SVC */
@/* void OS_TASK_SWAP(void) --- context switch */
@/* void OSStartHighRdy(void) --- start highest priority task */
@/* */
@/* AUTHOR */
@/* */
@/* cooljet */
@/* DATE: */
@/* 2003-06-07 */
@/* */
@/* HISTORY */
@/* */
@/* NAME DATE REMARKS */
@/* cooljet 2003-06-06 13:10 Modify for PBI-2 */
@/*************************************************************************/
.EQU SwiV , 0x08
.EQU IrqV , 0x18
.EQU FiqV , 0x1C
.EQU NoInt , 0x80
.EQU SVC32Mode , 0x13
.EQU IRQ32Mode , 0x12
.EQU FIQ32Mode , 0x11
.EQU OSEnterSWI , 0x00
.EQU BIT_TIMER0 , (0x1<<13)
.EQU I_ISPC , 0x1e00024
.EQU INTMSK , 0x1e0000c
@
@ These defines are use in the INT_IRQ processing for UART,
@ and Timer0 Interrupts
@
.EQU TIMER0_INT , 0x00002000
@/*************************************************************************/
@/* External symbols we need the addresses of */
@/*************************************************************************/
.EXTERN OSTCBCur
addr_OSTCBCur :
.LONG OSTCBCur
.EXTERN OSTCBHighRdy
addr_OSTCBHighRdy :
.LONG OSTCBHighRdy
.EXTERN OSPrioCur
addr_OSPrioCur :
.LONG OSPrioCur
.EXTERN OSPrioHighRdy
addr_OSPrioHighRdy :
.LONG OSPrioHighRdy
@/*************************************************************************/
@/* IRQ Controller Regs */
@/*************************************************************************/
INTPND_REG :
.LONG 0x01E00004 /*IRQ Pending (1 = Pending)*/
.EXTERN need_to_swap_context
.EXTERN IrqStart
.EXTERN OSTimeTick
.EXTERN IrqFinish
.EXTERN irq_entry
.EXTERN OutDebug
.EXTERN BreakPoint
@/*************************************************************************/
@/* */
@/* FUNCTION */
@/* */
@/* TickHandler */
@/* */
@/* DESCRIPTION */
@/* */
@/* This function will be called when every tick is expired */
@/* */
@/* - Call IrqStart */
@/* - Call OSTimeTick */
@/* - Call IrqFinish */
@/* - Context switching when necessaryly */
@/* */
@/* AUTHOR */
@/* */
@/* @ */
@/* DATE: */
@/* 2003-06-05 */
@/* CALLED BY */
@/* */
@/* */
@/* CALLS */
@/* */
@/* none */
@/* */
@/* INPUTS */
@/* */
@/* None */
@/* */
@/* OUTPUTS */
@/* */
@/* None */
@/* */
@/* HISTORY */
@/* */
@/* NAME DATE REMARKS */
@/* */
@/* */
@/*************************************************************************/
@VOID TickHandler(void)
@{
.GLOBAL OSTickISR
OSTickISR :
STMDB sp!,{r0-r12,lr}
@ interrupt disable(not nessary)
mrs r0, CPSR
orr r0, r0, #0x80 @ and set IRQ disable flag
msr CPSR_cxsf, r0
@End of interrupt
@(Clear pending bit of INTPEND that don't accessed it.)
@ rI_ISPC= BIT_TIMER0;
LDR r0, =I_ISPC
LDR r1, =BIT_TIMER0
STR r1, [r0]
BL IrqStart
BL OSTimeTick
BL IrqFinish
LDR r0, =need_to_swap_context
LDR r2, [r0]
CMP r2, #1
LDREQ pc, =_CON_SW
_NOT_CON_SW :
@not context switching
LDMIA sp!,{r0-r12, lr}
SUBS pc, lr, #4
_CON_SW:
@set need_to_swap_context is '0'
MOV r1, #0
STR r1, [r0]
@now context switching
LDMIA sp!,{r0-r12,lr}
SUB lr, lr, #4
STR lr, SAVED_LR
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@Change Supervisor mode
@!!!r12 register don't preserved. (r12 that PC of task)
MRS lr, SPSR
AND lr, lr, #0xFFFFFFE0
ORR lr, lr, #0x13
MSR CPSR_cxsf, lr
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@Now Supervisor mode
@;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
STR r12, [sp, #-8] @ saved r12
LDR r12, SAVED_LR
STMFD sp!, {r12} @ r12 that PC of task
SUB sp, sp, #4 @ inclease stack point
LDMIA sp!, {r12} @ restore r12
STMFD sp!, {lr} @ save lr
STMFD sp!, {r0-r12} @ save register file and ret address
MRS r4, CPSR
STMFD sp!, {r4} @ save current PSR
MRS r4, SPSR @ YYY+
STMFD sp!, {r4} @ YYY+ save SPSR
@ OSPrioCur = OSPrioHighRdy
LDR r4, addr_OSPrioCur
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