tqm8272.c

uboot200903最新版本的通用uboot

		printf ("(60x:9COL - %ld MB, ", psize >> 20);
	} else {
		psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR1_8COL,
						  (uchar *) CONFIG_SYS_SDRAM_BASE, 8);
		printf ("(60x:8COL - %ld MB, ", psize >> 20);
	}

#endif /* CONFIG_SYS_RAMBOOT */

	icache_enable ();

	return (psize);
}


static inline int scanChar (char *p, int len, unsigned long *number)
{
	int	akt = 0;

	*number = 0;
	while (akt < len) {
		if ((*p >= '0') && (*p <= '9')) {
			*number *= 10;
			*number += *p - '0';
			p += 1;
		} else {
			if (*p == '-')	return akt;
			return -1;
		}
		akt ++;
	}
	return akt;
}

static int dump_hwib(void)
{
	HWIB_INFO	*hw = &hwinf;
	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
	char *s = getenv("serial#");

	if (hw->OK) {
		printf ("HWIB on %x\n", HWIB_INFO_START_ADDR);
		printf ("serial : %s\n", s);
		printf ("ethaddr: %s\n", hw->ethaddr);
		printf ("FLASH	: %x nr:%d\n", hw->flash, hw->flash_nr);
		printf ("RAM	: %x cs:%d\n", hw->ram, hw->ram_cs);
		printf ("CPU	: %lu\n", hw->cpunr);
		printf ("CAN	: %d\n", hw->can);
		if (hw->eeprom) printf ("EEprom : %x\n", hw->eeprom);
		else printf ("No EEprom\n");
		if (hw->nand) {
			printf ("NAND	: %x\n", hw->nand);
			printf ("NAND CS: %d\n", hw->nand_cs);
		} else { printf ("No NAND\n");}
		printf ("Bus %s mode.\n", (hw->Bus ? "60x" : "Single PQII"));
		printf ("  real : %s\n", (immr->im_siu_conf.sc_bcr & BCR_EBM ? \
				 "60x" : "Single PQII"));
		printf ("Option : %lx\n", hw->option);
		printf ("%s Security Engine\n", (hw->SecEng ? "with" : "no"));
		printf ("CPM Clk: %d\n", hw->cpmcl);
		printf ("CPU Clk: %d\n", hw->cpucl);
		printf ("Bus Clk: %d\n", hw->buscl);
		if (hw->busclk_real_ok) {
			printf ("  real Clk: %d\n", hw->busclk_real);
		}
		printf ("CAS	: %d\n", get_cas_latency());
	} else {
		printf("HWIB @%x not OK\n", HWIB_INFO_START_ADDR);
	}
	return 0;
}

static inline int search_real_busclk (int *clk)
{
	int	part = 0, pos = 0;
	char *p = (char *) CIB_INFO_START_ADDR;
	int	ok = 0;

	while ((*p != '\0') && (pos < CIB_INFO_LEN)) {
		if (*p < ' ' || *p > '~') { /* ASCII strings! */
			return 0;
		}
		switch (part) {
		default:
			if (*p == '-') {
				++part;
			}
			break;
		case 3:
			if (*p == '-') {
				++part;
				break;
			}
			if (*p == 'b') {
				ok = 1;
				p++;
				break;
			}
			if (ok) {
				switch (*p) {
				case '6':
					*clk = 66666666;
					return 1;
					break;
				case '1':
					if (p[1] == '3') {
						*clk = 133333333;
					} else {
						*clk = 100000000;
					}
					return 1;
					break;
				}
			}
			break;
		}
		p++;
	}
	return 0;
}

int analyse_hwib (void)
{
	char	*p = (char *) HWIB_INFO_START_ADDR;
	int	anz;
	int	part = 1, i = 0, pos = 0;
	HWIB_INFO	*hw = &hwinf;

	deb_printf(" %s pointer: %p\n", __FUNCTION__, p);
	/* Head = TQM */
	if (*((unsigned long *)p) != (unsigned long)CONFIG_SYS_HWINFO_MAGIC) {
		deb_printf("No HWIB\n");
		return -1;
	}
	p += 3;
	if (scanChar (p, 4, &hw->cpunr) < 0) {
		deb_printf("No CPU\n");
		return -2;
	}
	p +=4;

	hw->flash = 0x200000 << (*p - 'A');
	p++;
	hw->flash_nr = *p - '0';
	p++;

	hw->ram = 0x2000000 << (*p - 'A');
	p++;
	if (*p == '2') {
		hw->ram_cs = 2;
		p++;
	}

	if (*p == 'A') hw->can = 1;
	if (*p == 'B') hw->can = 2;
	p +=1;
	p +=1;	/* connector */
	if (*p != '0') {
		hw->eeprom = 0x1000 << (*p - 'A');
	}
	p++;

	if ((*p < '0') || (*p > '9')) {
		/* NAND before z-option */
		hw->nand = 0x8000000 << (*p - 'A');
		p++;
		hw->nand_cs = *p - '0';
		p += 2;
	}
	/* z-option */
	anz = scanChar (p, 4, &hw->option);
	if (anz < 0) {
		deb_printf("No option\n");
		return -3;
	}
	if (hw->option & 0x8) hw->Bus = 1;
	p += anz;
	if (*p != '-') {
		deb_printf("No -\n");
		return -4;
	}
	p++;
	/* C option */
	if (*p == 'E') {
		hw->SecEng = 1;
		p++;
	}
	switch (*p) {
		case 'M': hw->cpucl = 266666666;
			break;
		case 'P': hw->cpucl = 300000000;
			break;
		case 'T': hw->cpucl = 400000000;
			break;
		default:
			deb_printf("No CPU Clk: %c\n", *p);
			return -5;
			break;
	}
	p++;
	switch (*p) {
		case 'I': hw->cpmcl = 200000000;
			break;
		case 'M': hw->cpmcl = 300000000;
			break;
		default:
			deb_printf("No CPM Clk\n");
			return -6;
			break;
	}
	p++;
	switch (*p) {
		case 'B': hw->buscl = 66666666;
			break;
		case 'E': hw->buscl = 100000000;
			break;
		case 'F': hw->buscl = 133333333;
			break;
		default:
			deb_printf("No BUS Clk\n");
			return -7;
			break;
	}
	p++;

	hw->OK = 1;
	/* search MAC Address */
	while ((*p != '\0') && (pos < CONFIG_SYS_HWINFO_SIZE)) {
		if (*p < ' ' || *p > '~') { /* ASCII strings! */
			return 0;
		}
		switch (part) {
		default:
			if (*p == ' ') {
				++part;
				i = 0;
			}
			break;
		case 3:			/* Copy MAC address */
			if (*p == ' ') {
				++part;
				i = 0;
				break;
			}
			hw->ethaddr[i++] = *p;
			if ((i % 3) == 2)
				hw->ethaddr[i++] = ':';
			break;

		}
		p++;
	}

	hw->busclk_real_ok = search_real_busclk (&hw->busclk_real);
	return 0;
}

#if defined(CONFIG_GET_CPU_STR_F)
/* !! This routine runs from Flash */
char get_cpu_str_f (char *buf)
{
	char *p = (char *) HWIB_INFO_START_ADDR;
	int	i = 0;

	buf[i++] = 'M';
	buf[i++] = 'P';
	buf[i++] = 'C';
	if (*((unsigned long *)p) == (unsigned long)CONFIG_SYS_HWINFO_MAGIC) {
		buf[i++] = *&p[3];
		buf[i++] = *&p[4];
		buf[i++] = *&p[5];
		buf[i++] = *&p[6];
	} else {
		buf[i++] = '8';
		buf[i++] = '2';
		buf[i++] = '7';
		buf[i++] = 'x';
	}
	buf[i++] = 0;
	return 0;
}
#endif

#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
/* !! This routine runs from Flash */
unsigned long board_get_cpu_clk_f (void)
{
	char *p = (char *) HWIB_INFO_START_ADDR;
	int i = 0;

	if (*((unsigned long *)p) == (unsigned long)CONFIG_SYS_HWINFO_MAGIC) {
		if (search_real_busclk (&i))
			return i;
	}
	return CONFIG_8260_CLKIN;
}
#endif

#if CONFIG_BOARD_EARLY_INIT_R

static int can_test (unsigned long off)
{
	volatile unsigned char	*base	= (unsigned char *) (CONFIG_SYS_CAN_BASE + off);

	*(base + 0x17) = 'T';
	*(base + 0x18) = 'Q';
	*(base + 0x19) = 'M';
	if ((*(base + 0x17) != 'T') ||
	    (*(base + 0x18) != 'Q') ||
	    (*(base + 0x19) != 'M')) {
		return 0;
	}
	return 1;
}

static int can_config_one (unsigned long off)
{
	volatile unsigned char	*ctrl	= (unsigned char *) (CONFIG_SYS_CAN_BASE + off);
	volatile unsigned char	*cpu_if = (unsigned char *) (CONFIG_SYS_CAN_BASE + off + 0x02);
	volatile unsigned char	*clkout = (unsigned char *) (CONFIG_SYS_CAN_BASE + off + 0x1f);
	unsigned char temp;

	*cpu_if = 0x45;
	temp = *ctrl;
	temp |= 0x40;
	*ctrl	= temp;
	*clkout = 0x20;
	temp = *ctrl;
	temp &= ~0x40;
	*ctrl	= temp;
	return 0;
}

static int can_config (void)
{
	int	ret = 0;
	can_config_one (0);
	if (hwinf.can == 2) {
		can_config_one (0x100);
	}
	/* make Test if they really there */
	ret += can_test (0);
	ret += can_test (0x100);
	return ret;
}

static int init_can (void)
{
	volatile immap_t * immr = (immap_t *)CONFIG_SYS_IMMR;
	volatile memctl8260_t *memctl = &immr->im_memctl;
	int	count = 0;

	if ((hwinf.OK) && (hwinf.can)) {
		memctl->memc_or4 = CONFIG_SYS_CAN_OR;
		memctl->memc_br4 = CONFIG_SYS_CAN_BR;
		/* upm Init */
		upmconfig (UPMC, (uint *) upmTableFast,
			   sizeof (upmTableFast) / sizeof (uint));
		memctl->memc_mcmr =	(MxMR_DSx_3_CYCL |
					MxMR_GPL_x4DIS |
					MxMR_RLFx_2X |
					MxMR_WLFx_2X |
					MxMR_OP_NORM);
		/* can configure */
		count = can_config ();
		printf ("CAN:	%d @ %x\n", count, CONFIG_SYS_CAN_BASE);
		if (hwinf.can != count) printf("!!! difference to HWIB\n");
	} else {
		printf ("CAN:	No\n");
	}
	return 0;
}

int board_early_init_r(void)
{
	analyse_hwib ();
	init_can ();
	return 0;
}
#endif

int do_hwib_dump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
	dump_hwib ();
	return 0;
}

U_BOOT_CMD(
	  hwib, 1,	1,	do_hwib_dump,
	  "dump HWIB'",
	  "\n"
);

#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
static int get_flash_timing (void)
{
	/* get it from the option -tf in CIB */
	/* default is 0x00000c84 */
	int	ret = 0x00000c84;
	int	pos = 0;
	int	nr = 0;
	char	*p = (char *) CIB_INFO_START_ADDR;

	while ((*p != '\0') && (pos < CIB_INFO_LEN)) {
		if (*p < ' ' || *p > '~') { /* ASCII strings! */
			return ret;
		}
		if (*p == '-') {
			if ((p[1] == 't') && (p[2] == 'f')) {
				p += 6;
				ret = 0;
				while (nr < 8) {
				if ((*p >= '0') && (*p <= '9')) {
					ret *= 0x10;
					ret += *p - '0';
					p += 1;
					nr ++;
				} else if ((*p >= 'A') && (*p <= 'F')) {
					ret *= 10;
					ret += *p - '7';
					p += 1;
					nr ++;
				} else {
					if (nr < 8) return 0x00000c84;
					return ret;
				}
				}
			}
		}
		p++;
		pos++;
	}
	return ret;
}

/* Update the Flash_Size and the Flash Timing */
int update_flash_size (int flash_size)
{
	volatile immap_t * immr = (immap_t *)CONFIG_SYS_IMMR;
	volatile memctl8260_t *memctl = &immr->im_memctl;
	unsigned long reg;
	unsigned long tim;

	/* I must use reg, otherwise the board hang */
	reg = memctl->memc_or0;
	reg &= ~ORxU_AM_MSK;
	reg |= MEG_TO_AM(flash_size >> 20);
	tim = get_flash_timing ();
	reg &= ~0xfff;
	reg |= (tim & 0xfff);
	memctl->memc_or0 = reg;
	return 0;
}
#endif

#ifdef CONFIG_PCI
struct pci_controller hose;

int board_early_init_f (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

	immap->im_clkrst.car_sccr |= M826X_SCCR_PCI_MODE_EN;
	return 0;
}

extern void pci_mpc8250_init(struct pci_controller *);

void pci_init_board(void)
{
	pci_mpc8250_init(&hose);
}
#endif

int board_eth_init(bd_t *bis)
{
	return pci_eth_init(bis);
}