📄 bf561_cdef.h
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#define bfin_read_SICB_ISR0() bfin_read32(SICB_ISR0)#define bfin_write_SICB_ISR0(val) bfin_write32(SICB_ISR0, val)#define pSICB_ISR1 ((uint32_t volatile *)SICB_ISR1)#define bfin_read_SICB_ISR1() bfin_read32(SICB_ISR1)#define bfin_write_SICB_ISR1(val) bfin_write32(SICB_ISR1, val)#define pSICB_IWR0 ((uint32_t volatile *)SICB_IWR0)#define bfin_read_SICB_IWR0() bfin_read32(SICB_IWR0)#define bfin_write_SICB_IWR0(val) bfin_write32(SICB_IWR0, val)#define pSICB_IWR1 ((uint32_t volatile *)SICB_IWR1)#define bfin_read_SICB_IWR1() bfin_read32(SICB_IWR1)#define bfin_write_SICB_IWR1(val) bfin_write32(SICB_IWR1, val)#define pSICB_IAR0 ((uint32_t volatile *)SICB_IAR0)#define bfin_read_SICB_IAR0() bfin_read32(SICB_IAR0)#define bfin_write_SICB_IAR0(val) bfin_write32(SICB_IAR0, val)#define pSICB_IAR1 ((uint32_t volatile *)SICB_IAR1)#define bfin_read_SICB_IAR1() bfin_read32(SICB_IAR1)#define bfin_write_SICB_IAR1(val) bfin_write32(SICB_IAR1, val)#define pSICB_IAR2 ((uint32_t volatile *)SICB_IAR2)#define bfin_read_SICB_IAR2() bfin_read32(SICB_IAR2)#define bfin_write_SICB_IAR2(val) bfin_write32(SICB_IAR2, val)#define pSICB_IAR3 ((uint32_t volatile *)SICB_IAR3)#define bfin_read_SICB_IAR3() bfin_read32(SICB_IAR3)#define bfin_write_SICB_IAR3(val) bfin_write32(SICB_IAR3, val)#define pSICB_IAR4 ((uint32_t volatile *)SICB_IAR4)#define bfin_read_SICB_IAR4() bfin_read32(SICB_IAR4)#define bfin_write_SICB_IAR4(val) bfin_write32(SICB_IAR4, val)#define pSICB_IAR5 ((uint32_t volatile *)SICB_IAR5)#define bfin_read_SICB_IAR5() bfin_read32(SICB_IAR5)#define bfin_write_SICB_IAR5(val) bfin_write32(SICB_IAR5, val)#define pSICB_IAR6 ((uint32_t volatile *)SICB_IAR6)#define bfin_read_SICB_IAR6() bfin_read32(SICB_IAR6)#define bfin_write_SICB_IAR6(val) bfin_write32(SICB_IAR6, val)#define pSICB_IAR7 ((uint32_t volatile *)SICB_IAR7)#define bfin_read_SICB_IAR7() bfin_read32(SICB_IAR7)#define bfin_write_SICB_IAR7(val) bfin_write32(SICB_IAR7, val)#define pPPI0_CONTROL ((uint16_t volatile *)PPI0_CONTROL)#define bfin_read_PPI0_CONTROL() bfin_read16(PPI0_CONTROL)#define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL, val)#define pPPI0_STATUS ((uint16_t volatile *)PPI0_STATUS)#define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS)#define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS, val)#define pPPI0_DELAY ((uint16_t volatile *)PPI0_DELAY)#define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY)#define bfin_write_PPI0_DELAY(val) bfin_write16(PPI0_DELAY, val)#define pPPI0_COUNT ((uint16_t volatile *)PPI0_COUNT)#define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT)#define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT, val)#define pPPI0_FRAME ((uint16_t volatile *)PPI0_FRAME)#define bfin_read_PPI0_FRAME() bfin_read16(PPI0_FRAME)#define bfin_write_PPI0_FRAME(val) bfin_write16(PPI0_FRAME, val)#define pPPI1_CONTROL ((uint16_t volatile *)PPI1_CONTROL)#define bfin_read_PPI1_CONTROL() bfin_read16(PPI1_CONTROL)#define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL, val)#define pPPI1_STATUS ((uint16_t volatile *)PPI1_STATUS)#define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS)#define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS, val)#define pPPI1_DELAY ((uint16_t volatile *)PPI1_DELAY)#define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY)#define bfin_write_PPI1_DELAY(val) bfin_write16(PPI1_DELAY, val)#define pPPI1_COUNT ((uint16_t volatile *)PPI1_COUNT)#define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT)#define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT, val)#define pPPI1_FRAME ((uint16_t volatile *)PPI1_FRAME)#define bfin_read_PPI1_FRAME() bfin_read16(PPI1_FRAME)#define bfin_write_PPI1_FRAME(val) bfin_write16(PPI1_FRAME, val)#define pTBUFCTL ((uint32_t volatile *)TBUFCTL)#define bfin_read_TBUFCTL() bfin_read32(TBUFCTL)#define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val)#define pTBUFSTAT ((uint32_t volatile *)TBUFSTAT)#define bfin_read_TBUFSTAT() bfin_read32(TBUFSTAT)#define bfin_write_TBUFSTAT(val) bfin_write32(TBUFSTAT, val)#define pTBUF ((uint32_t volatile *)TBUF)#define bfin_read_TBUF() bfin_read32(TBUF)#define bfin_write_TBUF(val) bfin_write32(TBUF, val)#define pPFCTL ((uint32_t volatile *)PFCTL)#define bfin_read_PFCTL() bfin_read32(PFCTL)#define bfin_write_PFCTL(val) bfin_write32(PFCTL, val)#define pPFCNTR0 ((uint32_t volatile *)PFCNTR0)#define bfin_read_PFCNTR0() bfin_read32(PFCNTR0)#define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0, val)#define pPFCNTR1 ((uint32_t volatile *)PFCNTR1)#define bfin_read_PFCNTR1() bfin_read32(PFCNTR1)#define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1, val)#define pSRAM_BASE_ADDR_CORE_A ((uint32_t volatile *)SRAM_BASE_ADDR_CORE_A)#define bfin_read_SRAM_BASE_ADDR_CORE_A() bfin_read32(SRAM_BASE_ADDR_CORE_A)#define bfin_write_SRAM_BASE_ADDR_CORE_A(val) bfin_write32(SRAM_BASE_ADDR_CORE_A, val)#define pSRAM_BASE_ADDR_CORE_B ((uint32_t volatile *)SRAM_BASE_ADDR_CORE_B)#define bfin_read_SRAM_BASE_ADDR_CORE_B() bfin_read32(SRAM_BASE_ADDR_CORE_B)#define bfin_write_SRAM_BASE_ADDR_CORE_B(val) bfin_write32(SRAM_BASE_ADDR_CORE_B, val)#define pEVT_OVERRIDE ((uint32_t volatile *)EVT_OVERRIDE)#define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE)#define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val)#define pUART_THR ((uint16_t volatile *)UART_THR)#define bfin_read_UART_THR() bfin_read16(UART_THR)#define bfin_write_UART_THR(val) bfin_write16(UART_THR, val)#define pUART_RBR ((uint16_t volatile *)UART_RBR)#define bfin_read_UART_RBR() bfin_read16(UART_RBR)#define bfin_write_UART_RBR(val) bfin_write16(UART_RBR, val)#define pUART_DLL ((uint16_t volatile *)UART_DLL)#define bfin_read_UART_DLL() bfin_read16(UART_DLL)#define bfin_write_UART_DLL(val) bfin_write16(UART_DLL, val)#define pUART_DLH ((uint16_t volatile *)UART_DLH)#define bfin_read_UART_DLH() bfin_read16(UART_DLH)#define bfin_write_UART_DLH(val) bfin_write16(UART_DLH, val)#define pUART_IER ((uint16_t volatile *)UART_IER)#define bfin_read_UART_IER() bfin_read16(UART_IER)#define bfin_write_UART_IER(val) bfin_write16(UART_IER, val)#define pUART_IIR ((uint16_t volatile *)UART_IIR)#define bfin_read_UART_IIR() bfin_read16(UART_IIR)#define bfin_write_UART_IIR(val) bfin_write16(UART_IIR, val)#define pUART_LCR ((uint16_t volatile *)UART_LCR)#define bfin_read_UART_LCR() bfin_read16(UART_LCR)#define bfin_write_UART_LCR(val) bfin_write16(UART_LCR, val)#define pUART_MCR ((uint16_t volatile *)UART_MCR)#define bfin_read_UART_MCR() bfin_read16(UART_MCR)#define bfin_write_UART_MCR(val) bfin_write16(UART_MCR, val)#define pUART_LSR ((uint16_t volatile *)UART_LSR)#define bfin_read_UART_LSR() bfin_read16(UART_LSR)#define bfin_write_UART_LSR(val) bfin_write16(UART_LSR, val)#define pUART_MSR ((uint16_t volatile *)UART_MSR)#define bfin_read_UART_MSR() bfin_read16(UART_MSR)#define bfin_write_UART_MSR(val) bfin_write16(UART_MSR, val)#define pUART_SCR ((uint16_t volatile *)UART_SCR)#define bfin_read_UART_SCR() bfin_read16(UART_SCR)#define bfin_write_UART_SCR(val) bfin_write16(UART_SCR, val)#define pUART_GCTL ((uint16_t volatile *)UART_GCTL)#define bfin_read_UART_GCTL() bfin_read16(UART_GCTL)#define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL, val)#define pUART_GBL ((uint16_t volatile *)UART_GBL)#define bfin_read_UART_GBL() bfin_read16(UART_GBL)#define bfin_write_UART_GBL(val) bfin_write16(UART_GBL, val)#define pEBIU_AMGCTL ((uint16_t volatile *)EBIU_AMGCTL)#define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL)#define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val)#define pEBIU_AMBCTL0 ((uint32_t volatile *)EBIU_AMBCTL0)#define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0)#define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)#define pEBIU_AMBCTL1 ((uint32_t volatile *)EBIU_AMBCTL1)#define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1)#define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)#define pEBIU_SDGCTL ((uint32_t volatile *)EBIU_SDGCTL)#define bfin_read_EBIU_SDGCTL() bfin_read32(EBIU_SDGCTL)#define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL, val)#define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL)#define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL)#define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val)#define pEBIU_SDRRC ((uint16_t volatile *)EBIU_SDRRC)#define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)#define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val)#define pEBIU_SDSTAT ((uint16_t volatile *)EBIU_SDSTAT)#define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT)#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT, val)#endif /* __BFIN_CDEF_ADSP_BF561_proc__ */⌨️ 快捷键说明
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