📄 adsp-edn-extended_cdef.h
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#define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)#define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)#define pSIC_ISR ((uint32_t volatile *)SIC_ISR) /* Interrupt Status Register */#define bfin_read_SIC_ISR() bfin_read32(SIC_ISR)#define bfin_write_SIC_ISR(val) bfin_write32(SIC_ISR, val)#define pSIC_IWR ((uint32_t volatile *)SIC_IWR) /* Interrupt Wakeup Register */#define bfin_read_SIC_IWR() bfin_read32(SIC_IWR)#define bfin_write_SIC_IWR(val) bfin_write32(SIC_IWR, val)#define pUART_THR ((uint16_t volatile *)UART_THR) /* Transmit Holding */#define bfin_read_UART_THR() bfin_read16(UART_THR)#define bfin_write_UART_THR(val) bfin_write16(UART_THR, val)#define pUART_DLL ((uint16_t volatile *)UART_DLL) /* Divisor Latch Low Byte */#define bfin_read_UART_DLL() bfin_read16(UART_DLL)#define bfin_write_UART_DLL(val) bfin_write16(UART_DLL, val)#define pUART_DLH ((uint16_t volatile *)UART_DLH) /* Divisor Latch High Byte */#define bfin_read_UART_DLH() bfin_read16(UART_DLH)#define bfin_write_UART_DLH(val) bfin_write16(UART_DLH, val)#define pUART_IER ((uint16_t volatile *)UART_IER)#define bfin_read_UART_IER() bfin_read16(UART_IER)#define bfin_write_UART_IER(val) bfin_write16(UART_IER, val)#define pUART_IIR ((uint16_t volatile *)UART_IIR)#define bfin_read_UART_IIR() bfin_read16(UART_IIR)#define bfin_write_UART_IIR(val) bfin_write16(UART_IIR, val)#define pUART_LCR ((uint16_t volatile *)UART_LCR)#define bfin_read_UART_LCR() bfin_read16(UART_LCR)#define bfin_write_UART_LCR(val) bfin_write16(UART_LCR, val)#define pUART_MCR ((uint16_t volatile *)UART_MCR)#define bfin_read_UART_MCR() bfin_read16(UART_MCR)#define bfin_write_UART_MCR(val) bfin_write16(UART_MCR, val)#define pUART_LSR ((uint16_t volatile *)UART_LSR)#define bfin_read_UART_LSR() bfin_read16(UART_LSR)#define bfin_write_UART_LSR(val) bfin_write16(UART_LSR, val)#define pUART_SCR ((uint16_t volatile *)UART_SCR)#define bfin_read_UART_SCR() bfin_read16(UART_SCR)#define bfin_write_UART_SCR(val) bfin_write16(UART_SCR, val)#define pUART_RBR ((uint16_t volatile *)UART_RBR) /* Receive Buffer */#define bfin_read_UART_RBR() bfin_read16(UART_RBR)#define bfin_write_UART_RBR(val) bfin_write16(UART_RBR, val)#define pUART_GCTL ((uint16_t volatile *)UART_GCTL)#define bfin_read_UART_GCTL() bfin_read16(UART_GCTL)#define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL, val)#define pSPT0_TX_CONFIG0 ((uint16_t volatile *)SPT0_TX_CONFIG0)#define bfin_read_SPT0_TX_CONFIG0() bfin_read16(SPT0_TX_CONFIG0)#define bfin_write_SPT0_TX_CONFIG0(val) bfin_write16(SPT0_TX_CONFIG0, val)#define pSPT0_TX_CONFIG1 ((uint16_t volatile *)SPT0_TX_CONFIG1)#define bfin_read_SPT0_TX_CONFIG1() bfin_read16(SPT0_TX_CONFIG1)#define bfin_write_SPT0_TX_CONFIG1(val) bfin_write16(SPT0_TX_CONFIG1, val)#define pSPT0_RX_CONFIG0 ((uint16_t volatile *)SPT0_RX_CONFIG0)#define bfin_read_SPT0_RX_CONFIG0() bfin_read16(SPT0_RX_CONFIG0)#define bfin_write_SPT0_RX_CONFIG0(val) bfin_write16(SPT0_RX_CONFIG0, val)#define pSPT0_RX_CONFIG1 ((uint16_t volatile *)SPT0_RX_CONFIG1)#define bfin_read_SPT0_RX_CONFIG1() bfin_read16(SPT0_RX_CONFIG1)#define bfin_write_SPT0_RX_CONFIG1(val) bfin_write16(SPT0_RX_CONFIG1, val)#define pSPT0_TX ((uint32_t volatile *)SPT0_TX)#define bfin_read_SPT0_TX() bfin_read32(SPT0_TX)#define bfin_write_SPT0_TX(val) bfin_write32(SPT0_TX, val)#define pSPT0_RX ((uint32_t volatile *)SPT0_RX)#define bfin_read_SPT0_RX() bfin_read32(SPT0_RX)#define bfin_write_SPT0_RX(val) bfin_write32(SPT0_RX, val)#define pSPT0_TSCLKDIV ((uint16_t volatile *)SPT0_TSCLKDIV)#define bfin_read_SPT0_TSCLKDIV() bfin_read16(SPT0_TSCLKDIV)#define bfin_write_SPT0_TSCLKDIV(val) bfin_write16(SPT0_TSCLKDIV, val)#define pSPT0_RSCLKDIV ((uint16_t volatile *)SPT0_RSCLKDIV)#define bfin_read_SPT0_RSCLKDIV() bfin_read16(SPT0_RSCLKDIV)#define bfin_write_SPT0_RSCLKDIV(val) bfin_write16(SPT0_RSCLKDIV, val)#define pSPT0_TFSDIV ((uint16_t volatile *)SPT0_TFSDIV)#define bfin_read_SPT0_TFSDIV() bfin_read16(SPT0_TFSDIV)#define bfin_write_SPT0_TFSDIV(val) bfin_write16(SPT0_TFSDIV, val)#define pSPT0_RFSDIV ((uint16_t volatile *)SPT0_RFSDIV)#define bfin_read_SPT0_RFSDIV() bfin_read16(SPT0_RFSDIV)#define bfin_write_SPT0_RFSDIV(val) bfin_write16(SPT0_RFSDIV, val)#define pSPT0_STAT ((uint16_t volatile *)SPT0_STAT)#define bfin_read_SPT0_STAT() bfin_read16(SPT0_STAT)#define bfin_write_SPT0_STAT(val) bfin_write16(SPT0_STAT, val)#define pSPT0_MTCS0 ((uint32_t volatile *)SPT0_MTCS0)#define bfin_read_SPT0_MTCS0() bfin_read32(SPT0_MTCS0)#define bfin_write_SPT0_MTCS0(val) bfin_write32(SPT0_MTCS0, val)#define pSPT0_MTCS1 ((uint32_t volatile *)SPT0_MTCS1)#define bfin_read_SPT0_MTCS1() bfin_read32(SPT0_MTCS1)#define bfin_write_SPT0_MTCS1(val) bfin_write32(SPT0_MTCS1, val)#define pSPT0_MTCS2 ((uint32_t volatile *)SPT0_MTCS2)#define bfin_read_SPT0_MTCS2() bfin_read32(SPT0_MTCS2)#define bfin_write_SPT0_MTCS2(val) bfin_write32(SPT0_MTCS2, val)#define pSPT0_MTCS3 ((uint32_t volatile *)SPT0_MTCS3)#define bfin_read_SPT0_MTCS3() bfin_read32(SPT0_MTCS3)#define bfin_write_SPT0_MTCS3(val) bfin_write32(SPT0_MTCS3, val)#define pSPT0_MRCS0 ((uint32_t volatile *)SPT0_MRCS0)#define bfin_read_SPT0_MRCS0() bfin_read32(SPT0_MRCS0)#define bfin_write_SPT0_MRCS0(val) bfin_write32(SPT0_MRCS0, val)#define pSPT0_MRCS1 ((uint32_t volatile *)SPT0_MRCS1)#define bfin_read_SPT0_MRCS1() bfin_read32(SPT0_MRCS1)#define bfin_write_SPT0_MRCS1(val) bfin_write32(SPT0_MRCS1, val)#define pSPT0_MRCS2 ((uint32_t volatile *)SPT0_MRCS2)#define bfin_read_SPT0_MRCS2() bfin_read32(SPT0_MRCS2)#define bfin_write_SPT0_MRCS2(val) bfin_write32(SPT0_MRCS2, val)#define pSPT0_MRCS3 ((uint32_t volatile *)SPT0_MRCS3)#define bfin_read_SPT0_MRCS3() bfin_read32(SPT0_MRCS3)#define bfin_write_SPT0_MRCS3(val) bfin_write32(SPT0_MRCS3, val)#define pSPT0_MCMC1 ((uint16_t volatile *)SPT0_MCMC1)#define bfin_read_SPT0_MCMC1() bfin_read16(SPT0_MCMC1)#define bfin_write_SPT0_MCMC1(val) bfin_write16(SPT0_MCMC1, val)#define pSPT0_MCMC2 ((uint16_t volatile *)SPT0_MCMC2)#define bfin_read_SPT0_MCMC2() bfin_read16(SPT0_MCMC2)#define bfin_write_SPT0_MCMC2(val) bfin_write16(SPT0_MCMC2, val)#define pSPT0_CHNL ((uint16_t volatile *)SPT0_CHNL)#define bfin_read_SPT0_CHNL() bfin_read16(SPT0_CHNL)#define bfin_write_SPT0_CHNL(val) bfin_write16(SPT0_CHNL, val)#define pSPT1_TX_CONFIG0 ((uint16_t volatile *)SPT1_TX_CONFIG0)#define bfin_read_SPT1_TX_CONFIG0() bfin_read16(SPT1_TX_CONFIG0)#define bfin_write_SPT1_TX_CONFIG0(val) bfin_write16(SPT1_TX_CONFIG0, val)#define pSPT1_TX_CONFIG1 ((uint16_t volatile *)SPT1_TX_CONFIG1)#define bfin_read_SPT1_TX_CONFIG1() bfin_read16(SPT1_TX_CONFIG1)#define bfin_write_SPT1_TX_CONFIG1(val) bfin_write16(SPT1_TX_CONFIG1, val)#define pSPT1_RX_CONFIG0 ((uint16_t volatile *)SPT1_RX_CONFIG0)#define bfin_read_SPT1_RX_CONFIG0() bfin_read16(SPT1_RX_CONFIG0)#define bfin_write_SPT1_RX_CONFIG0(val) bfin_write16(SPT1_RX_CONFIG0, val)#define pSPT1_RX_CONFIG1 ((uint16_t volatile *)SPT1_RX_CONFIG1)#define bfin_read_SPT1_RX_CONFIG1() bfin_read16(SPT1_RX_CONFIG1)#define bfin_write_SPT1_RX_CONFIG1(val) bfin_write16(SPT1_RX_CONFIG1, val)#define pSPT1_TX ((uint16_t volatile *)SPT1_TX)#define bfin_read_SPT1_TX() bfin_read16(SPT1_TX)#define bfin_write_SPT1_TX(val) bfin_write16(SPT1_TX, val)#define pSPT1_RX ((uint16_t volatile *)SPT1_RX)#define bfin_read_SPT1_RX() bfin_read16(SPT1_RX)#define bfin_write_SPT1_RX(val) bfin_write16(SPT1_RX, val)#define pSPT1_TSCLKDIV ((uint16_t volatile *)SPT1_TSCLKDIV)#define bfin_read_SPT1_TSCLKDIV() bfin_read16(SPT1_TSCLKDIV)#define bfin_write_SPT1_TSCLKDIV(val) bfin_write16(SPT1_TSCLKDIV, val)#define pSPT1_RSCLKDIV ((uint16_t volatile *)SPT1_RSCLKDIV)#define bfin_read_SPT1_RSCLKDIV() bfin_read16(SPT1_RSCLKDIV)#define bfin_write_SPT1_RSCLKDIV(val) bfin_write16(SPT1_RSCLKDIV, val)#define pSPT1_TFSDIV ((uint16_t volatile *)SPT1_TFSDIV)#define bfin_read_SPT1_TFSDIV() bfin_read16(SPT1_TFSDIV)#define bfin_write_SPT1_TFSDIV(val) bfin_write16(SPT1_TFSDIV, val)#define pSPT1_RFSDIV ((uint16_t volatile *)SPT1_RFSDIV)#define bfin_read_SPT1_RFSDIV() bfin_read16(SPT1_RFSDIV)#define bfin_write_SPT1_RFSDIV(val) bfin_write16(SPT1_RFSDIV, val)#define pSPT1_STAT ((uint16_t volatile *)SPT1_STAT)#define bfin_read_SPT1_STAT() bfin_read16(SPT1_STAT)#define bfin_write_SPT1_STAT(val) bfin_write16(SPT1_STAT, val)#define pSPT1_MTCS0 ((uint32_t volatile *)SPT1_MTCS0)#define bfin_read_SPT1_MTCS0() bfin_read32(SPT1_MTCS0)#define bfin_write_SPT1_MTCS0(val) bfin_write32(SPT1_MTCS0, val)#define pSPT1_MTCS1 ((uint32_t volatile *)SPT1_MTCS1)#define bfin_read_SPT1_MTCS1() bfin_read32(SPT1_MTCS1)#define bfin_write_SPT1_MTCS1(val) bfin_write32(SPT1_MTCS1, val)#define pSPT1_MTCS2 ((uint32_t volatile *)SPT1_MTCS2)#define bfin_read_SPT1_MTCS2() bfin_read32(SPT1_MTCS2)#define bfin_write_SPT1_MTCS2(val) bfin_write32(SPT1_MTCS2, val)#define pSPT1_MTCS3 ((uint32_t volatile *)SPT1_MTCS3)#define bfin_read_SPT1_MTCS3() bfin_read32(SPT1_MTCS3)#define bfin_write_SPT1_MTCS3(val) bfin_write32(SPT1_MTCS3, val)#define pSPT1_MRCS0 ((uint32_t volatile *)SPT1_MRCS0)#define bfin_read_SPT1_MRCS0() bfin_read32(SPT1_MRCS0)#define bfin_write_SPT1_MRCS0(val) bfin_write32(SPT1_MRCS0, val)#define pSPT1_MRCS1 ((uint32_t volatile *)SPT1_MRCS1)#define bfin_read_SPT1_MRCS1() bfin_read32(SPT1_MRCS1)#define bfin_write_SPT1_MRCS1(val) bfin_write32(SPT1_MRCS1, val)#define pSPT1_MRCS2 ((uint32_t volatile *)SPT1_MRCS2)#define bfin_read_SPT1_MRCS2() bfin_read32(SPT1_MRCS2)#define bfin_write_SPT1_MRCS2(val) bfin_write32(SPT1_MRCS2, val)#define pSPT1_MRCS3 ((uint32_t volatile *)SPT1_MRCS3)#define bfin_read_SPT1_MRCS3() bfin_read32(SPT1_MRCS3)#define bfin_write_SPT1_MRCS3(val) bfin_write32(SPT1_MRCS3, val)#define pSPT1_MCMC1 ((uint16_t volatile *)SPT1_MCMC1)#define bfin_read_SPT1_MCMC1() bfin_read16(SPT1_MCMC1)#define bfin_write_SPT1_MCMC1(val) bfin_write16(SPT1_MCMC1, val)#define pSPT1_MCMC2 ((uint16_t volatile *)SPT1_MCMC2)#define bfin_read_SPT1_MCMC2() bfin_read16(SPT1_MCMC2)#define bfin_write_SPT1_MCMC2(val) bfin_write16(SPT1_MCMC2, val)#define pSPT1_CHNL ((uint16_t volatile *)SPT1_CHNL)#define bfin_read_SPT1_CHNL() bfin_read16(SPT1_CHNL)#define bfin_write_SPT1_CH⌨️ 快捷键说明
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