picunit.twr

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Release 7.1.04i Trace H.42
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

c:/xilinx/bin/nt/trce.exe -ise d:\ksc\lab2\micro_oven.ise -intstyle ise -e 3 -l
3 -s 6 -xml picunit picunit.ncd -o picunit.twr picunit.pcf


Design file:              picunit.ncd
Physical constraint file: picunit.pcf
Device,speed:             xc2s50e,-6 (PRODUCTION 1.18 2005-01-22)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock PIC_clk
------------+------------+------------+------------------+--------+
            |  Setup to  |  Hold to   |                  |  Clock |
Source      | clk (edge) | clk (edge) |Internal Clock(s) |  Phase |
------------+------------+------------+------------------+--------+
Clear       |    3.198(R)|   -1.948(R)|PIC_clk_BUFGP     |   0.000|
Key_num<0>  |    1.362(R)|   -0.464(R)|PIC_clk_BUFGP     |   0.000|
Key_num<1>  |    1.939(R)|   -1.214(R)|PIC_clk_BUFGP     |   0.000|
Key_num<2>  |    1.500(R)|   -0.859(R)|PIC_clk_BUFGP     |   0.000|
Set         |    2.695(R)|    0.028(R)|PIC_clk_BUFGP     |   0.000|
Start       |    1.949(R)|   -0.576(R)|PIC_clk_BUFGP     |   0.000|
TC          |    2.825(R)|   -1.571(R)|PIC_clk_BUFGP     |   0.000|
------------+------------+------------+------------------+--------+

Clock PIC_clk to Pad
-------------+------------+------------------+--------+
             | clk (edge) |                  |  Clock |
Destination  | to PAD     |Internal Clock(s) |  Phase |
-------------+------------+------------------+--------+
Counter_EN   |    8.420(R)|PIC_clk_BUFGP     |   0.000|
Counter_Reset|    6.430(R)|PIC_clk_BUFGP     |   0.000|
Key_EN       |    6.430(R)|PIC_clk_BUFGP     |   0.000|
LED<0>       |    7.923(R)|PIC_clk_BUFGP     |   0.000|
LED<1>       |    8.027(R)|PIC_clk_BUFGP     |   0.000|
LED<2>       |    8.067(R)|PIC_clk_BUFGP     |   0.000|
-------------+------------+------------------+--------+

Clock to Setup on destination clock PIC_clk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
PIC_clk        |    2.780|         |         |         |
---------------+---------+---------+---------+---------+

Analysis completed Mon Mar 09 12:19:58 2009
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Peak Memory Usage: 66 MB