key_number_encoder.vhd

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-- Company: 
-- Engineer:
--
-- Create Date:    10:28:02 02/09/09
-- Design Name:    
-- Module Name:    key_number_encoder - Behavioral
-- Project Name:   
-- Target Device:  
-- Tool versions:  
-- Description:
--
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity key_number_encoder is
    Port ( clk : in std_logic;
	 		  key_en	: in std_logic;
	        key_in : in std_logic_vector(9 downto 0);
	        kload  : out std_logic;
           Qn : out std_logic_vector(3 downto 0));
end key_number_encoder;

architecture Behavioral of key_number_encoder is
begin
  process (clk,key_in)
	 begin
	  if clk ='1' and clk' event then
	   if key_en='1' then --Skip, if "Set" button push
				 case key_in is
				  when"0000000001"=>Qn<="0000"; kload <='1'; 
				  when"0000000010"=>Qn<="0001"; kload <='1';
				  when"0000000100"=>Qn<="0010"; kload <='1';
				  when"0000001000"=>Qn<="0011"; kload <='1';
				  when"0000010000"=>Qn<="0100"; kload <='1';
				  when"0000100000"=>Qn<="0101"; kload <='1';
				  when"0001000000"=>Qn<="0110"; kload <='1';
	  			  when"0010000000"=>Qn<="0111"; kload <='1';
				  when"0100000000"=>Qn<="1000"; kload <='1';
				  when"1000000000"=>Qn<="1001"; kload <='1';
				  when others => Qn<="0000"; kload <='0';
	   		 end case;
	
		end if;
     end if;
	end process;
end Behavioral;