addern.vhd

加法器测试平台

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity addern is
	generic(N : integer);
	port (a    : in std_logic_vector(N downto 1);
	      b    : in std_logic_vector(N downto 1);
	      cin  : in std_logic;
	      sum  : out std_logic_vector(N downto 1);
	      cout : out std_logic);
    end addern;