behavioral.vhd

来自「加法器测试平台」· VHDL 代码 · 共 13 行

architecture behavioral of addern is
    signal result: unsigned (n+1 downto 1);
    signal carry: unsigned(n+1 downto 1);
    constant zeros: unsigned(n downto 1):=(others=>'0');    
    begin
        carry<=(zeros&cin);
        result<=('0'&unsigned(a))+('0'&unsigned(b))+carry;
        sum<=std_logic_vector(result(n downto 1));
        cout<=result(n+1);
end behavioral;