c_k.hif

基于VDHL的38译码器的实现与58分频器的实现 FPGA主芯片：CycloneII EP2C35F672C6

Version 6.0 Build 178 04/27/2006 SJ Full Version
11
767
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
c_k
# storage
db|c_k.(0).cnf
db|c_k.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c_k.vhd
a4ea2a61d5624c16e6ba35a120ab3c22
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# complete