📄 sfr_38d2.h
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------------------------------------------------------*/
bit CH0 = ADCON.0; /* Analog Input Pin selection Bits (0-2) */
bit CH1 = ADCON.1; /* */
bit CH2 = ADCON.2; /* */
bit ADSTP = ADCON.3; /* AD Conversion Completion Bit */
bit CKS = ADCON.4; /* AD Conversion Clock Selection Bit */
bit ADKEY = ADCON.5; /* ADKEY Enable Bit */
bit BITS = ADCON.6; /* 10-Bit or 8-Bit Conversion Switch Bit */
bit ADKEYS = ADCON.7; /* ADKEY Selection Bit */
/*------------------------------------------------------
AD Conversion Register (0016H)
------------------------------------------------------*/
bit VCUT = ADL.0; /* Vref Input Switch Bit */
/*------------------------------------------------------
Serial I/O1 Status Register (0019H)
------------------------------------------------------*/
bit TBE1 = SIO1STS.0; /* Transmit Buffer Empty Flag */
bit RBF1 = SIO1STS.1; /* Receive Buffer Full Flag */
bit TSC1 = SIO1STS.2; /* Transmit Shift Completion Flag */
bit OE1 = SIO1STS.3; /* Overrun Error Flag */
bit PE1 = SIO1STS.4; /* Parity Error Flag */
bit FE1 = SIO1STS.5; /* Framing Error Flag */
bit SE1 = SIO1STS.6; /* Summing Error Flag */
/*------------------------------------------------------
Serial I/O1 Control Register (001AH)
------------------------------------------------------*/
bit CSS1 = SIO1CON.0; /* BRG Count Source Selection Bit */
bit SCS1 = SIO1CON.1; /* Serial I/O1 Synchronous Clock Selection Bit */
bit SRDY1 = SIO1CON.2; /* SRDY1 Output Enable Bit */
bit TIC1 = SIO1CON.3; /* Transmit Interrupt Source Selection Bit */
bit TE1 = SIO1CON.4; /* Transmit Enable Bit */
bit RE1 = SIO1CON.5; /* Receive Enable Bit */
bit SIOM1 = SIO1CON.6; /* Serial I/O1 Mode Selection Bit */
bit SIOE1 = SIO1CON.7; /* Serial I/O1 Enable Bit */
/*------------------------------------------------------
UART1 Control Register (001BH)
------------------------------------------------------*/
bit CHAS1 = UART1CON.0; /* Character Length Selection Bit */
bit PARE1 = UART1CON.1; /* Parity Enable Bit */
bit PARS1 = UART1CON.2; /* Parity Selection Bit */
bit STPS1 = UART1CON.3; /* Stop Bit Length Selection Bit */
bit POFF1 = UART1CON.4; /* P55/TXD1 P-Channel Output Disable Bit */
/*------------------------------------------------------
Serial I/O2 Status Register (001EH)
------------------------------------------------------*/
bit TBE2 = SIO2STS.0; /* Transmit Buffer Empty Flag */
bit RBF2 = SIO2STS.1; /* Receive Buffer Full Flag */
bit TSC2 = SIO2STS.2; /* Transmit Shift Completion Flag */
bit OE2 = SIO2STS.3; /* Overrun Error Flag */
bit PE2 = SIO2STS.4; /* Parity Error Flag */
bit FE2 = SIO2STS.5; /* Framing Error Flag */
bit SE2 = SIO2STS.6; /* Summing Error Flag */
/*------------------------------------------------------
Serial I/O2 Control Register (001FH)
------------------------------------------------------*/
bit CSS2 = SIO2CON.0; /* BRG Count Source Selection Bit */
bit SCS2 = SIO2CON.1; /* Serial I/O2 Synchronous Clock Selection Bit */
bit SRDY2 = SIO2CON.2; /* SRDY2 Output Enable Bit */
bit TIC2 = SIO2CON.3; /* Transmit Interrupt Source Selection Bit */
bit TE2 = SIO2CON.4; /* Transmit Enable Bit */
bit RE2 = SIO2CON.5; /* Receive Enable Bit */
bit SIOM2 = SIO2CON.6; /* Serial I/O2 Mode Selection Bit */
bit SIOE2 = SIO2CON.7; /* Serial I/O2 Enable Bit */
/*------------------------------------------------------
PWM01 Register (0024H)
------------------------------------------------------*/
bit PWM0S0 = PWM01.0; /* PWM0 Set Bits (0,1) */
bit PWM0S1 = PWM01.1; /* */
bit PWM1S0 = PWM01.2; /* PWM1 Set Bits (2,3) */
bit PWM1S1 = PWM01.3; /* */
/*------------------------------------------------------
Timer 12 Mode Register (0025H)
------------------------------------------------------*/
bit T1STP = T12M.0; /* Timer 1 Count Stop Bit */
bit T2STP = T12M.1; /* Timer 2 Count Stop Bit */
bit T1CS0 = T12M.2; /* Timer 1 Count Source Selection Bits (2,3) */
bit T1CS1 = T12M.3; /* */
bit T2CS0 = T12M.4; /* Timer 2 Count Source Selection Bits (4,5) */
bit T2CS1 = T12M.5; /* */
bit T2OS = T12M.6; /* Timer 2 Output Selection Bit */
bit T2EDG = T12M.7; /* T2OUT Output Edge Switch Bit */
/*------------------------------------------------------
Timer 34 Mode Register (0026H)
------------------------------------------------------*/
bit T3STP = T34M.0; /* Timer 3 Count Stop Bit */
bit T4STP = T34M.1; /* Timer 4 Count Stop Bit */
bit T3CS = T34M.2; /* Timer 3 Count Source Selection Bit */
bit T4CS0 = T34M.3; /* Timer 4 Count Source Selection Bits (3,4) */
bit T4CS1 = T34M.4; /* */
bit T3MOD = T34M.5; /* Timer 3 Operating Mode Selection Bit */
bit T4MOD = T34M.6; /* Timer 4 Operating Mode Selection Bit */
/*------------------------------------------------------
Timer 1234 Mode Register (0027H)
------------------------------------------------------*/
bit T3EDG = T1234M.0; /* T3out Output Edge Switch Bit */
bit T4EDG = T1234M.1; /* T4out Output Edge Switch Bit */
bit T3OS = T1234M.2; /* Timer 3 Output Selection Bit */
bit T4OS = T1234M.3; /* Timer 4 Output Selection Bit */
bit T2WC = T1234M.4; /* Timer 2 Write Control Bit */
bit T3WC = T1234M.5; /* Timer 3 Write Control Bit */
bit T4WC = T1234M.6; /* Timer 4 Write Control Bit */
/*------------------------------------------------------
Timer 1234 Frequency Division Selection Register (0028H)
------------------------------------------------------*/
bit T1FDS0 = PRE1234.0; /* Timer 1 Frequency Division Selection Bits (0,1) */
bit T1FDS1 = PRE1234.1; /* */
bit T2FDS0 = PRE1234.2; /* Timer 2 Frequency Division Selection Bits (2,3) */
bit T2FDS1 = PRE1234.3; /* */
bit T3FDS0 = PRE1234.4; /* Timer 3 Frequency Division Selection Bits (4,5) */
bit T3FDS1 = PRE1234.5; /* */
bit T4FDS0 = PRE1234.6; /* Timer 4 Frequency Division Selection Bits (6,7) */
bit T4FDS1 = PRE1234.7; /* */
/*------------------------------------------------------
Watchdog Timer Control Register (0029H)
------------------------------------------------------*/
bit WHCKSE2 = WDTCON.5; /* Watchdog Timer Count Source Selection Bit 2 */
bit STPFS = WDTCON.6; /* STP Instruction Function Selection Bit */
bit WHCKSEL = WDTCON.7; /* Watchdog Timer Count Source Selection Bit */
/*------------------------------------------------------
Timer X Mode Register (002DH)
------------------------------------------------------*/
bit TXMOD0 = TXM.0; /* Timer X Operating Mode Bits (0-2) */
bit TXMOD1 = TXM.1; /* */
bit TXMOD2 = TXM.2; /* */
bit TXWC = TXM.3; /* Timer X Write Control Bit */
bit TXCS = TXM.4; /* Timer X Count Source Selection Bit */
bit DCE = TXM.5; /* Data for Control of Event Counter Window */
bit TXSTP = TXM.6; /* Timer X Count Stop Bit */
bit TX1OS = TXM.7; /* Timer X Output 1 Selection Bit */
/*------------------------------------------------------
Timer X Control Register 1 (002EH)
------------------------------------------------------*/
bit NFCL = TXCON1.0; /* Noise Filter Sampling Clock Selection Bit */
bit EXTRG0 = TXCON1.1; /* External Trigger Delay Time Selection Bits (1,2) */
bit EXTRG1 = TXCON1.2; /* */
bit TXCL1 = TXCON1.3; /* Timer X Output 1 Control Bit */
bit TXCL2 = TXCON1.4; /* Timer X Output 2 Control Bit */
bit TX1EDG = TXCON1.5; /* Timer X Output 1 Edge Switch Bit */
bit R0EDG0 = TXCON1.6; /* CNTR0 Active Edge Switch Bits (6,7) */
bit R0EDG1 = TXCON1.7; /* */
/*------------------------------------------------------
Timer X Control Register 2 (002FH)
------------------------------------------------------*/
bit TX2OS = TXCON2.0; /* Timer X Output 2 Selection Bit */
bit TX2EDG = TXCON2.1; /* Timer X Output 2 Active Edge Switch Bit */
bit TXFDS0 = TXCON2.2; /* Timer X Diving Frequency Selection Bits (2,3) */
bit TXFDS1 = TXCON2.3; /* */
bit TXTRG = TXCON2.4; /* Trigger for IGBT Input Control Bit */
/*------------------------------------------------------
Timer Y Mode Register (0038H)
------------------------------------------------------*/
bit TYRP1 = TYM.0; /* Real Time Port 1 Control Bit */
bit TYRP2 = TYM.1; /* Real Time Port 2 Control Bit */
bit TYDRP0 = TYM.2; /* P46 Data for Real Time Port */
bit TYDRP1 = TYM.3; /* P47 Data for Real Time Port */
bit TYMOD0 = TYM.4; /* Timer Y Operating Mode Bits (4,5) */
bit TYMOD1 = TYM.5; /* */
bit R1EDG = TYM.6; /* CNTR1 Active Edge Switch Bit */
bit TYSTP = TYM.7; /* Timer Y Count Stop Bit */
/*------------------------------------------------------
Timer Y Control Register (0039H)
------------------------------------------------------*/
bit TYWC = TYCON.0; /* Timer Y Write Control Bit */
bit TYCS = TYCON.1; /* Timer Y Count Source Selection Bit */
bit TYFDS0 = TYCON.2; /* Timer Y Frequency Division Selection Bits (2,3) */
bit TYFDS1 = TYCON.3; /* */
/*------------------------------------------------------
Interrupt Edge Selection Register (003AH)
------------------------------------------------------*/
bit INT0PL = INTEDGE.0; /* INT0 Interrupt Edge Selection Bit */
bit INT1PL = INTEDGE.1; /* INT1 Interrupt Edge Selection Bit */
bit INT2PL = INTEDGE.2; /* INT2 Interrupt Edge Selection Bit */
bit ISS0 = INTEDGE.3; /* INT2/Key Input Interrupt Switch Bit */
bit ISS1 = INTEDGE.4; /* Timer Y/CNTR1 Interrupt Switch Bit */
/*------------------------------------------------------
CPU Mode Register (003BH)
------------------------------------------------------*/
bit CM0 = CPUM.0; /* Processor Mode Bits (0,1) */
bit CM1 = CPUM.1; /* */
bit CM2 = CPUM.2; /* Stack Page Selection Bit */
bit CM3 = CPUM.3; /* Internal System Clock Selection Bit */
bit CM4 = CPUM.4; /* Port Xc Switch Bit */
bit CM5 = CPUM.5; /* Xin-Xout Oscillation Stop Bit */
bit CM6 = CPUM.6; /* Main Clock Division Ratio Selection Bits (6,7) */
bit CM7 = CPUM.7; /* */
/*------------------------------------------------------
Interrupt Request Register 1 (003CH)
------------------------------------------------------*/
bit IR_INT0 = IREQ1.0; /* INT0 Interrupt Request Bit */
bit IR_INT1 = IREQ1.1; /* INT1 Interrupt Request Bit */
bit IR_I2KEY = IREQ1.2; /* INT2 Interrupt Request Bit
Key Input Interrupt Request Bit */
bit IR_CNTR0 = IREQ1.3; /* CNTR0 Interrupt Request Bit */
bit IR_TX = IREQ1.4; /* Timer X Interrupt Request Bit */
bit IR_T1 = IREQ1.5; /* Timer 1 Interrupt Request Bit */
bit IR_T2 = IREQ1.6; /* Timer 2 Interrupt Request Bit */
bit IR_T3 = IREQ1.7; /* Timer 3 Interrupt Request Bit */
/*------------------------------------------------------
Interrupt Request Register 2 (003DH)
------------------------------------------------------*/
bit IR_T4 = IREQ2.0; /* Timer 4 Interrupt Request Bit */
bit IR_S1R = IREQ2.1; /* Serial I/O1 Receive Interrupt Request Bit */
bit IR_S1T = IREQ2.2; /* Serial I/O1 Transmit Interrupt Request Bit */
bit IR_S2R = IREQ2.3; /* Serial I/O2 Receive Interrupt Request Bit */
bit IR_S2T = IREQ2.4; /* Serial I/O2 Transmit Interrupt Request Bit */
bit IR_TYC1 = IREQ2.5; /* Timer Y Interrupt Request Bit
CNTR1 Interrupt Request Bit */
bit IR_AD = IREQ2.6; /* AD Conversion Interrupt Request Bit */
/*------------------------------------------------------
Interrupt Control Register 1 (003EH)
------------------------------------------------------*/
bit IE_INT0 = ICON1.0; /* INT0 Interrupt Enable Bit */
bit IE_INT1 = ICON1.1; /* INT1 Interrupt Enable Bit */
bit IE_I2KEY = ICON1.2; /* INT2 Interrupt Enable Bit
Key Input Interrupt Enable Bit */
bit IE_CNTR0 = ICON1.3; /* CNTR0 Interrupt Enable Bit */
bit IE_TX = ICON1.4; /* Timer X Interrupt Enable Bit */
bit IE_T1 = ICON1.5; /* Timer 1 Interrupt Enable Bit */
bit IE_T2 = ICON1.6; /* Timer 2 Interrupt Enable Bit */
bit IE_T3 = ICON1.7; /* Timer 3 Interrupt Enable Bit */
/*------------------------------------------------------
Interrupt Control Register 2 (003FH)
------------------------------------------------------*/
bit IE_T4 = ICON2.0; /* Timer 4 Interrupt Enable Bit */
bit IE_S1R = ICON2.1; /* Serial I/O1 Receive Interrupt Enable Bit */
bit IE_S1T = ICON2.2; /* Serial I/O1 Transmit Interrupt Enable Bit */
bit IE_S2R = ICON2.3; /* Serial I/O2 Receive Interrupt Enable Bit */
bit IE_S2T = ICON2.4; /* Serial I/O2 Receive Interrupt Enable Bit */
bit IE_TYC1 = ICON2.5; /* Timer Y Interrupt Enable Bit
CNTR1 Interrupt Enable Bit */
bit IE_AD = ICON2.6; /* AD Conversion Interrupt Enable Bit */
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