📄 mac_power_management.s51
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EXTERN mscInfo
EXTERN mtxInfo
EXTERN ppib
// E:\公司产品资料\Zigbee\cc2431\cc2431定位\LOC_Engine\lib\mac\CC2430\mac_power_management.c
// 1 /*******************************************************************************************************
// 2 * *
// 3 * ********** *
// 4 * ************ *
// 5 * *** *** *
// 6 * *** +++ *** *
// 7 * *** + + *** *
// 8 * *** + CHIPCON CC2430 INTEGRATED 802.15.4 MAC AND PHY *
// 9 * *** + + *** CC2430 Power Management *
// 10 * *** +++ *** *
// 11 * *** *** *
// 12 * ************ *
// 13 * ********** *
// 14 * *
// 15 *******************************************************************************************************
// 16 * CONFIDENTIAL *
// 17 * The use of this file is restricted by the signed MAC software license agreement. *
// 18 * *
// 19 * Copyright Chipcon AS, 2005 *
// 20 *******************************************************************************************************
// 21 * This module contains functions to be used by the higher layer to power down the CC2430. *
// 22 *******************************************************************************************************/
// 23 #include <mac_headers.h>
ASEGN SFR_AN:DATA:NOROOT,087H
// unsigned char volatile __sfr PCON
PCON:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0beH
// unsigned char volatile __sfr SLEEP
SLEEP:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0c3H
// unsigned char volatile __sfr T2CNF
T2CNF:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0c6H
// unsigned char volatile __sfr CLKCON
CLKCON:
DS 1
ASEGN SFR_AN:DATA:NOROOT,0e1H
// unsigned char volatile __sfr RFST
RFST:
DS 1
// 24
// 25 //-------------------------------------------------------------------------------------------------------
// 26 // Internal module data
RSEG XDATA_Z:XDATA:NOROOT(0)
REQUIRE __INIT_XDATA_Z
// 27 MPM_INFO mpmInfo;
mpmInfo:
DS 2
// 28 //-------------------------------------------------------------------------------------------------------
// 29 void mpmSetTask(MAC_TASK_INFO *pTask);
// 30
// 31 static void ResumeCoordinatorAfterPowerDown (RESUME_MODE resumeMode, BOOL synchronousStart);
// 32 static void ResumeDeviceAfterPowerDown (RESUME_MODE resumeMode, BOOL synchronousStart);
// 33
// 34 //-------------------------------------------------------------------------------------------------------
// 35 // Simple power up/down functions
RSEG NEAR_CODE:CODE:NOROOT(0)
// 36 ROOT void mpmTurnOnVregAndReset(void)
mpmTurnOnVregAndReset:
CFI Block cfiBlock0 Using cfiCommon0
CFI Function mpmTurnOnVregAndReset
// 37 {
FUNCALL mpmTurnOnVregAndReset, halMacWait
LOCFRAME ISTACK, 2, STACK
ARGFRAME ISTACK, 2, STACK
PUSH DPL
CFI DPL0 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH DPH
CFI DPH0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
; Saved register size: 2
; Auto size: 0
// 38 DISABLE_GLOBAL_INT ();
CLR 0xa8.7
// 39 //RFR_MAINH = RESET_RF_CHIP_ON;
// 40 RFPWR = VREG_POWER_UP;
MOV A,#0x4
MOV DPTR,#-0x20e9
MOVX @DPTR,A
// 41 CLKCON = 0;
MOV 0xc6,#0x0
// 42 halMacWait (0xFF);
; Setup parameters for call to function halMacWait
MOV R2,#-0x1
MOV R3,#0x0
LCALL halMacWait
// 43 ENABLE_GLOBAL_INT ();
LJMP ?Subroutine0
CFI EndBlock cfiBlock0
// 44 }
// 45
RSEG NEAR_CODE:CODE:NOROOT(0)
// 46 ROOT void mpmTurnOffReset(void)
mpmTurnOffReset:
CFI Block cfiBlock1 Using cfiCommon0
CFI Function mpmTurnOffReset
// 47 {
; Saved register size: 0
; Auto size: 0
// 48 DISABLE_GLOBAL_INT();
CLR 0xa8.7
// 49 //RFR_MAINH = RESET_RF_CHIP_OFF;
// 50 ENABLE_GLOBAL_INT();
SETB 0xa8.7
// 51 }
RET
CFI EndBlock cfiBlock1
// 52
RSEG NEAR_CODE:CODE:NOROOT(0)
// 53 ROOT void mpmTurnOnXosc(void)
mpmTurnOnXosc:
CFI Block cfiBlock2 Using cfiCommon0
CFI Function mpmTurnOnXosc
// 54 {
; Saved register size: 0
; Auto size: 0
// 55 DISABLE_GLOBAL_INT();
CLR 0xa8.7
// 56 ISRXON; // TBD: Must be WRONG
MOV 0xe1,#-0x1e
// 57 ENABLE_GLOBAL_INT();
SETB 0xa8.7
// 58 }
RET
CFI EndBlock cfiBlock2
// 59
RSEG NEAR_CODE:CODE:NOROOT(0)
// 60 ROOT void mpmTurnOffVreg(void)
mpmTurnOffVreg:
CFI Block cfiBlock3 Using cfiCommon0
CFI Function mpmTurnOffVreg
// 61 {
PUSH DPL
CFI DPL0 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH DPH
CFI DPH0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
; Saved register size: 2
; Auto size: 0
// 62 DISABLE_GLOBAL_INT();
CLR 0xa8.7
// 63 //RFR_MAINH = RESET_RF_CHIP_ON;
// 64 RFPWR = VREG_POWER_DOWN;
MOV A,#0x4
MOV DPTR,#-0x20e9
MOVX @DPTR,A
// 65 ENABLE_GLOBAL_INT();
SJMP ?Subroutine0
CFI EndBlock cfiBlock3
// 66 }
// 67
RSEG NEAR_CODE:CODE:NOROOT(0)
// 68 ROOT void mpmTurnOffXosc(void)
mpmTurnOffXosc:
CFI Block cfiBlock4 Using cfiCommon0
CFI Function mpmTurnOffXosc
// 69 {
; Saved register size: 0
; Auto size: 0
// 70 DISABLE_GLOBAL_INT();
CLR 0xa8.7
// 71 ISRFOFF;
MOV 0xe1,#-0x1b
// 72 ENABLE_GLOBAL_INT();
SETB 0xa8.7
// 73 }
RET
CFI EndBlock cfiBlock4
// 74
// 75 //-------------------------------------------------------------------------------------------------------
// 76
// 77
// 78
// 79
// 80 //-------------------------------------------------------------------------------------------------------
// 81 // void mpmRestoreRegsAndRam(void)
// 82 //
// 83 // DESCRIPTION:
// 84 // Restores all CC2430 registers and RAM, assuming that there was no activity in the MAC layer at
// 85 // power-down. That includes:
// 86 // MDMCTRL0 (register) (PAN coordinator bit)
// 87 // MDMCTRL1 (register) (Correlation threshold, only required by old chip revisions, see data
// 88 // sheets)
// 89 // SECCTRL0 (register)
// 90 // PANID (RAM)
// 91 // IEEEADDR (RAM)
// 92 // SHORTADDR (RAM)
// 93 // FSCTRL (register)
// 94 //-------------------------------------------------------------------------------------------------------
RSEG NEAR_CODE:CODE:NOROOT(0)
// 95 ROOT void mpmRestoreRegsAndRam(void) {
mpmRestoreRegsAndRam:
CFI Block cfiBlock5 Using cfiCommon0
CFI Function mpmRestoreRegsAndRam
FUNCALL mpmRestoreRegsAndRam, msupWriteExtendedAddress
LOCFRAME ISTACK, 2, STACK
ARGFRAME ISTACK, 2, STACK
FUNCALL mpmRestoreRegsAndRam, msupSetChannel
LOCFRAME ISTACK, 2, STACK
ARGFRAME ISTACK, 2, STACK
PUSH DPL
CFI DPL0 Frame(CFA_SP, 3)
CFI CFA_SP SP+-3
PUSH DPH
CFI DPH0 Frame(CFA_SP, 4)
CFI CFA_SP SP+-4
; Saved register size: 2
; Auto size: 0
// 96
// 97 // Write default register values
// 98 DISABLE_GLOBAL_INT();
CLR 0xa8.7
// 99 #if MAC_OPT_FFD
// 100 WRITE_RFR16(MDMCTRL0, GET_MF(MF_PAN_COORDINATOR) ? MDMCTRL0_PAN_COORDINATOR : MDMCTRL0_NO_PAN_COORDINATOR);
MOV DPTR,#(macInfo + 6)
MOVX A,@DPTR
MOV C,0xE0 /* A */.1
JNC ??mpmRestoreRegsAndRam_0
MOV R1,#0x1a
SJMP ??mpmRestoreRegsAndRam_1
??mpmRestoreRegsAndRam_0:
MOV R1,#0xa
??mpmRestoreRegsAndRam_1:
MOV A,R1
MOV DPTR,#-0x20fe
MOVX @DPTR,A
MOV DPTR,#(macInfo + 6)
MOVX A,@DPTR
MOV C,0xE0 /* A */.1
MOV A,#-0x1e
MOV DPTR,#-0x20fd
MOVX @DPTR,A
// 101 #endif
// 102 ENABLE_AUTOACK();
MOVX A,@DPTR
SETB 0xE0 /* A */.4
MOVX @DPTR,A
// 103 WRITE_RFR16(MDMCTRL1, 0x1400);
MOV A,#0x14
MOV DPTR,#-0x20fc
MOVX @DPTR,A
CLR A
MOV DPTR,#-0x20fb
MOVX @DPTR,A
// 104 SET_FIFOP_THRESHOLD(4);
MOV A,#0x3
MOV DPTR,#-0x20b1
MOVX @DPTR,A
// 105 ENABLE_GLOBAL_INT();
SETB 0xa8.7
// 106
// 107 // PAN ID, extended and short addresses
// 108 WRITE_RFR16(PANID, mpib.macPANId);
MOV DPTR,#(mpib + 29)
MOVX A,@DPTR
MOV DPTR,#-0x20b5
MOVX @DPTR,A
MOV DPTR,#(mpib + 28)
MOVX A,@DPTR
MOV DPTR,#-0x20b4
MOVX @DPTR,A
// 109 WRITE_RFR16(SHORTADDR, mpib.macShortAddress);
MOV DPTR,#(mpib + 33)
MOVX A,@DPTR
MOV DPTR,#-0x20b3
MOVX @DPTR,A
MOV DPTR,#(mpib + 32)
MOVX A,@DPTR
MOV DPTR,#-0x20b2
MOVX @DPTR,A
// 110 msupWriteExtendedAddress(aExtendedAddress);
; Setup parameters for call to function msupWriteExtendedAddress
MOV R2,#(aExtendedAddress & 0xff)
MOV R3,#((aExtendedAddress >> 8) & 0xff)
LCALL msupWriteExtendedAddress
// 111
// 112 // Frequency word
// 113 msupSetChannel(ppib.phyCurrentChannel, TRUE);
; Setup parameters for call to function msupSetChannel
MOV R2,#0x1
MOV DPTR,#ppib
MOVX A,@DPTR
MOV R1,A
LCALL msupSetChannel
// 114
// 115 } // mpmRestoreRegsAndRam
SJMP ??Subroutine0_0
CFI EndBlock cfiBlock5
RSEG NEAR_CODE:CODE:NOROOT(0)
?Subroutine0:
CFI Block cfiBlock6 Using cfiCommon0
CFI NoFunction
CFI CFA_SP SP+-4
CFI DPL0 Frame(CFA_SP, 3)
CFI DPH0 Frame(CFA_SP, 4)
SETB 0xa8.7
??Subroutine0_0:
POP DPH
CFI CFA_SP SP+-3
CFI DPH0 SameValue
POP DPL
CFI CFA_SP SP+-2
CFI DPL0 SameValue
RET
CFI EndBlock cfiBlock6
// 116
// 117
// 118
// 119
// 120 //-------------------------------------------------------------------------------------------------------
// 121 // void mpmSetTask(MAC_TASK_INFO *pTask)
// 122 //
// 123 // DESCRIPTION:
// 124 // This task is responsible for controlling CC2430 power, as requested by the higher layer through
// 125 // mpmSetRequest. Power-down is currently only supported for non-beacon PANs.
// 126 //
// 127 // TASK DATA:
// 128 // The new power mode (MPM_CC2430_ON, MPM_CC2430_XOSC_OFF, or MPM_CC2430_XOSC_AND_VREG_OFF)
// 129 //-------------------------------------------------------------------------------------------------------
// 130 void mpmSetTask(MAC_TASK_INFO *pTask) NEAR {
// 131
// 132 // Powerdown is not permitted in non-beacon mode when "RX on when idle" is enabled
// 133 if ((mpib.macBeaconOrder == 15) && mpib.macRxOnWhenIdle) {
// 134 mschRemoveTask(pTask->priority, 0);
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