pwm_gen.fit.eqn

pwm模块pwm模块pwm模块pwm模块pwm模块

--L1_dffs[23] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[23] at LC27
L1_dffs[23]_p1_out = B1_send_timer & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[23]_p2_out = !B1_send_timer & L1_dffs[23];
L1_dffs[23]_or_out = L1_dffs[23]_p1_out # L1_dffs[23]_p2_out;
L1_dffs[23]_reg_input = L1_dffs[23]_or_out;
L1_dffs[23] = TFFE(L1_dffs[23]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[24] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[24] at LC28
L1_dffs[24]_p1_out = B1_send_timer & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[24]_p2_out = !B1_send_timer & L1_dffs[24];
L1_dffs[24]_or_out = L1_dffs[24]_p1_out # L1_dffs[24]_p2_out;
L1_dffs[24]_reg_input = L1_dffs[24]_or_out;
L1_dffs[24] = TFFE(L1_dffs[24]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[25] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[25] at LC29
L1_dffs[25]_p1_out = B1_send_timer & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[25]_p2_out = !B1_send_timer & L1_dffs[25];
L1_dffs[25]_or_out = L1_dffs[25]_p1_out # L1_dffs[25]_p2_out;
L1_dffs[25]_reg_input = L1_dffs[25]_or_out;
L1_dffs[25] = TFFE(L1_dffs[25]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[26] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[26] at LC30
L1_dffs[26]_p1_out = B1_send_timer & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[26]_p2_out = !B1_send_timer & L1_dffs[26];
L1_dffs[26]_or_out = L1_dffs[26]_p1_out # L1_dffs[26]_p2_out;
L1_dffs[26]_reg_input = L1_dffs[26]_or_out;
L1_dffs[26] = TFFE(L1_dffs[26]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[27] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[27] at LC31
L1_dffs[27]_p1_out = B1_send_timer & L1_dffs[26] & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[27]_p2_out = !B1_send_timer & L1_dffs[27];
L1_dffs[27]_or_out = L1_dffs[27]_p1_out # L1_dffs[27]_p2_out;
L1_dffs[27]_reg_input = L1_dffs[27]_or_out;
L1_dffs[27] = TFFE(L1_dffs[27]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[28] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[28] at LC32
L1_dffs[28]_p1_out = B1_send_timer & L1_dffs[27] & L1_dffs[26] & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[28]_p2_out = !B1_send_timer & L1_dffs[28];
L1_dffs[28]_or_out = L1_dffs[28]_p1_out # L1_dffs[28]_p2_out;
L1_dffs[28]_reg_input = L1_dffs[28]_or_out;
L1_dffs[28] = TFFE(L1_dffs[28]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[29] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[29] at LC22
L1_dffs[29]_p1_out = B1_send_timer & L1_dffs[0] & L1_dffs[28] & L1_dffs[27] & L1_dffs[26] & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1];
L1_dffs[29]_p2_out = !B1_send_timer & L1_dffs[29];
L1_dffs[29]_or_out = L1_dffs[29]_p1_out # L1_dffs[29]_p2_out;
L1_dffs[29]_reg_input = L1_dffs[29]_or_out;
L1_dffs[29] = TFFE(L1_dffs[29]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[30] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[30] at LC21
L1_dffs[30]_p1_out = B1_send_timer & L1_dffs[29] & L1_dffs[28] & L1_dffs[27] & L1_dffs[26] & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[30]_p2_out = !B1_send_timer & L1_dffs[30];
L1_dffs[30]_or_out = L1_dffs[30]_p1_out # L1_dffs[30]_p2_out;
L1_dffs[30]_reg_input = L1_dffs[30]_or_out;
L1_dffs[30] = TFFE(L1_dffs[30]_reg_input, !C1_carrier, GLOBAL(reset), , );


--L1_dffs[31] is pwm:inst4|lpm_counter:delay_counter_rtl_0|dffs[31] at LC18
L1_dffs[31]_p1_out = B1_send_timer & L1_dffs[30] & L1_dffs[29] & L1_dffs[28] & L1_dffs[27] & L1_dffs[26] & L1_dffs[25] & L1_dffs[24] & L1_dffs[23] & L1_dffs[22] & L1_dffs[21] & L1_dffs[20] & L1_dffs[19] & L1_dffs[18] & L1_dffs[17] & L1_dffs[16] & L1_dffs[15] & L1_dffs[14] & L1_dffs[13] & L1_dffs[12] & L1_dffs[11] & L1_dffs[10] & L1_dffs[9] & L1_dffs[8] & L1_dffs[7] & L1_dffs[6] & L1_dffs[5] & L1_dffs[4] & L1_dffs[3] & L1_dffs[2] & L1_dffs[1] & L1_dffs[0];
L1_dffs[31]_p2_out = !B1_send_timer & L1_dffs[31];
L1_dffs[31]_or_out = L1_dffs[31]_p1_out # L1_dffs[31]_p2_out;
L1_dffs[31]_reg_input = L1_dffs[31]_or_out;
L1_dffs[31] = TFFE(L1_dffs[31]_reg_input, !C1_carrier, GLOBAL(reset), , );


--D1_clock_out is pwm:inst4|clock_out at LC19
D1_clock_out_p1_out = !L1_dffs[31] & !L1_dffs[30] & !L1_dffs[29] & !L1_dffs[28] & !L1_dffs[27] & !L1_dffs[26] & !L1_dffs[25] & !L1_dffs[24] & !L1_dffs[23] & !L1_dffs[22] & !L1_dffs[21] & !L1_dffs[20] & !L1_dffs[19] & !L1_dffs[18] & !L1_dffs[17] & !L1_dffs[16] & !L1_dffs[15] & !L1_dffs[14] & !L1_dffs[13] & !L1_dffs[12] & !L1_dffs[11] & !L1_dffs[10] & !L1_dffs[9] & !L1_dffs[8] & !L1_dffs[7] & !L1_dffs[6] & !L1_dffs[5] & !L1_dffs[4] & !L1_dffs[3] & !L1_dffs[2] & L1_dffs[1] & !L1_dffs[0];
D1_clock_out_or_out = D1_clock_out_p1_out # !B1_send_timer;
D1_clock_out_reg_input = !(D1_clock_out_or_out);
D1_clock_out = DFFE(D1_clock_out_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1_nextState[0] is serialport_tx:inst5|nextState[0] at LC66
E1_nextState[0]_p1_out = !D1_clock_out & !E1_nextState[2] & !E1_nextState[3] & !E1_nextState[1] & !E1_nextState[0];
E1_nextState[0]_p2_out = E1_nextState[2] & E1_nextState[3] & !E1_nextState[0];
E1_nextState[0]_p4_out = E1_nextState[3] & E1_nextState[1] & !E1_nextState[0];
E1_nextState[0]_or_out = E1_nextState[0]_p1_out # E1_nextState[0]_p2_out # E1_nextState[0]_p4_out;
E1_nextState[0]_reg_input = !E1_nextState[0]_or_out;
E1_nextState[0] = TFFE(E1_nextState[0]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1_bit_index[0] is serialport_tx:inst5|bit_index[0] at LC68
E1_bit_index[0]_p1_out = !E1_nextState[0] & !E1_nextState[2] & !E1_bit_index[0] & !E1_nextState[3] & !E1_nextState[1];
E1_bit_index[0]_p2_out = E1_nextState[2] & E1_nextState[3];
E1_bit_index[0]_p4_out = E1_nextState[3] & E1_nextState[1];
E1_bit_index[0]_or_out = E1_bit_index[0]_p1_out # E1_bit_index[0]_p2_out # E1_bit_index[0]_p4_out;
E1_bit_index[0]_reg_input = !E1_bit_index[0]_or_out;
E1_bit_index[0] = TFFE(E1_bit_index[0]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1L17 is serialport_tx:inst5|idata~690 at LC86
E1L17_p1_out = !B1_byte_index[0] & !B1_byte_index[2] & !B1_byte_index[3] & !B1_byte_index[4];
E1L17_p2_out = B1_byte_index[0] & !B1_byte_index[2] & !B1_byte_index[3] & B1_byte_index[4];
E1L17_p3_out = !B1_byte_index[2] & !B1_byte_index[3] & B1_byte_index[1];
E1L17_or_out = E1L17_p1_out # E1L17_p2_out # E1L17_p3_out;
E1L17 = E1L17_or_out;


--E1_idata[6] is serialport_tx:inst5|idata[6] at LC16
E1_idata[6]_p1_out = D1_clock_out & E1L17 & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & !E1_idata[6];
E1_idata[6]_p2_out = !D1_clock_out & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[6];
E1_idata[6]_p4_out = !E1L17 & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[6];
E1_idata[6]_or_out = E1_idata[6]_p1_out # E1_idata[6]_p2_out # E1_idata[6]_p4_out;
E1_idata[6]_reg_input = E1_idata[6]_or_out;
E1_idata[6] = TFFE(E1_idata[6]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1L18 is serialport_tx:inst5|idata~699 at LC82
E1L18_p1_out = !B1_byte_index[0] & !B1_byte_index[1];
E1L18_p2_out = !B1_byte_index[1] & !B1_byte_index[4];
E1L18_or_out = E1L18_p1_out # E1L18_p2_out # B1_byte_index[2] # B1_byte_index[3];
E1L18 = E1L18_or_out;


--E1_idata[5] is serialport_tx:inst5|idata[5] at LC7
E1_idata[5]_p1_out = D1_clock_out & E1L18 & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & !E1_idata[5];
E1_idata[5]_p2_out = !D1_clock_out & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[5];
E1_idata[5]_p4_out = !E1L18 & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[5];
E1_idata[5]_or_out = E1_idata[5]_p1_out # E1_idata[5]_p2_out # E1_idata[5]_p4_out;
E1_idata[5]_reg_input = E1_idata[5]_or_out;
E1_idata[5] = TFFE(E1_idata[5]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1_idata[4] is serialport_tx:inst5|idata[4] at LC8
E1_idata[4]_p1_out = D1_clock_out & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & !E1_idata[4] & E1L19;
E1_idata[4]_p2_out = !D1_clock_out & !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[4];
E1_idata[4]_p4_out = !E1_nextState[0] & !E1_nextState[3] & !E1_nextState[2] & !E1_nextState[1] & E1_idata[4] & !B1_byte_index[4] & !B1_byte_index[2] & B1_byte_index[1] & !B1_byte_index[3];
E1_idata[4]_or_out = E1_idata[4]_p1_out # E1_idata[4]_p2_out # E1_idata[4]_p4_out;
E1_idata[4]_reg_input = E1_idata[4]_or_out;
E1_idata[4] = TFFE(E1_idata[4]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1_idata[3] is serialport_tx:inst5|idata[3] at LC2
E1_idata[3]_p0_out = E1_idata[3] & E1_nextState[1];
E1_idata[3]_p1_out = E1_nextState[0] & E1_idata[3];
E1_idata[3]_p2_out = E1_idata[3] & E1_nextState[3];
E1_idata[3]_p4_out = E1_idata[3] & E1_nextState[2];
E1_idata[3]_or_out = E1L13 # E1_idata[3]_p0_out # E1_idata[3]_p1_out # E1_idata[3]_p2_out # E1_idata[3]_p4_out;
E1_idata[3]_reg_input = E1_idata[3]_or_out;
E1_idata[3] = DFFE(E1_idata[3]_reg_input, !C1_carrier, GLOBAL(reset), , );


--E1_idata[2] is serialport_tx:inst5|idata[2] at LC15
E1_idata[2]_p0_out = E1_idata[2] & E1_nextState[1];
E1_idata[2]_p1_out = E1_nextState[0] & E1_idata[2];
E1_idata[2]_p2_out = E1_idata[2] & E1_nextState[3];
E1_idata[2]_p4_out = E1_idata[2] & E1_nextState[2];
E