📄 bl_esc_100a_307b.asm
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;-----------------------------------------------------------------------------; Copyright (C) 2006 by Takao.; All rights reserved.
; CURRENT_LIMITER: NOT AVAILABLE CURRENT_LIMITER;
; FILE NAME : BL_ESC_100A.ASM July. 30th. '05
; FILE NAME : BL_ESC_100Aa.ASM Aug. 15th. '05
; FILE NAME : BL_ESC_100A_LDP.ASM Aug. 25th. '05
; FILE NAME : BL_ESC_100A_LDP.ASM OCt. 10th. '05 for 1mm dia. x 23T 6-teeth 8P LDP motor
; FILE NAME : BL_ESC_100A_LDP.ASM Oct. 30th. '05 for 0.7mm dia. x 2s x 15T LDP motor
; FILE NAME : BL_ESC_100A2.ASM Jan. 1st. '06 for 0.7mm dia. x 2s x 15T LDP motor
; FILE NAME : BL_ESC_100A3.ASM Feb. 13. '06 for AXI 2820/12 motor
; FILE NAME : 100A series. BL_ESC_100A_307A.ASM, Apr. 21th '06
;
; Starting BEMF on-duty is 25% at INC_STEPPING_START_ON_DUTY:
;
; ACCELERATION_CKECK_AVERAGE_FILTER_COUNTER checkes max rpm in BEMF mode
; for smooth change to zero cross mode
; BEMF_SAMPLING_COUNTER checks slow down from zero cross to BEMF mode
; to avoid under BEMF sampling.
;
; TARGET MCU : C8051F330D
; DESCRIPTION : Quick power on buzzer sound
; + Start with Position detection + minimize the start current
; + BEMF for start run(BEMF_START_SPIN:)
; + reverse spin check(REVERSE_SPIN:)
; + BEMF power controlled run(BEMF_START0:)
; + Zero Cross switching 50%-100% power drive
; + Motor stop protection by WDT + Plane find motor buzzer
; + 5V minimum power voltage keeper + Current Limitter
;
; I hope that No need to adjust SAMPLING_TIMING by measuring BEMF OFF-DUTY inductive kick time
; I hope that No need to adjust START_CURRENT_ON_DUTY by minimize the start current routine
;
; Keep run if the power on time is over REAR_EDGE_TO_ZC_POINT by back to the BEMF mode
; Keep a few second run mode when stick off for PPM reciever
;
;
; NOTES: START_ON_DUTY_CONTROL: CloopX timing is chenged to 500nS as 2 times faster
; BEMF for start run(BEMF_START_SPIN:) with drive state sequence check to avoid reverse start spin
; BEMF<->ZeroCross control BEMF_FULL_ON is adjusted to 75% by BEMF high sampling rate at OFF_DUTY:
; sound is just one beep for quick start.
; The Spin current limitter function with LM339
; 5V power supply volatge keeper is added by D/A.
;
$include (c8051f330.inc) ; Include register definition file.;-----------------------------------------------------------------------------; EQUATES Parameters;-----------------------------------------------------------------------------
REAR_EDGE_TO_ZC_POINT equ 5
; This value concerns with zero cross max speed stability.
; Safty Margin of POWER on Time of the rear edge od inductive kick to zero cross point.
; May be "7" is for low voltage CD-ROM motor drive, may be "2" is good for high speed spin as ducted fan.
; This value is (T2) Sync out as "COULD_NOT_CATCH_CROSS_POINT" in zero cross mode.
; The time should be less than 500uS to get until zero coross point after inductive kick rear edge.
IND_KICK_TIME_CHECK equ 3 ; 490nS x 255 x this value
; The inductive kick time is checked by T2 high. and if the time is over this value.
; It means could not catch the indutive kick as sync. out.
BEMF_Duty_Inc_Timing equ 10 ; BEMF power step up increasing timing frame on Timer 2
;Starting parameters
START_STEPPING_DUTY_FRAME equ 80 ; Start duty checking Duty frame include shaft position routine
START_CURRENT_ON_DUTY equ 20 ; Init Current limit setting in on-duty setting
INC_START_CURRENT_ON_DUTY_STEP equ 5 ; Start power increasing step up while could not spin
STEPPING_ON_DUTY_CHOPPING_COUNT equ 35 ; Init Stepping starting current limit chopping count
END_OF_STEPPING_START_CNT equ 5 ; max starting try count of STEPPING_START. This is for motor burn-up protection at starting over load.
BEMF_start_run_on_duty_time_after_stepping_drive equ 50 ; Setting first BEMF spin torque
BEMF_start_run_off_duty_time_after_stepping_drive equ 250
SAMPLE_COUNT equ 6 ; minimum sampling count at one phase to avoid mis-fire in BEMF mode.
SAMPLING_TIMING equ 10 ; sampling frq. for default timing(max. 20) in BEMF mode. This value also concerns starting current.
BEMF_MAX_ON_DUTY equ 180 ; BEMF max On duty. OFF duty= BEMF_ON_DUTY - (ON_DUTY x2)
;
SLOW_START equ THROTTLE_OFF+STICK_BACK_HYS ; BEMF lowest power runs with this low power duty(%).
THROTTLE_OFF equ 10 ; Throttle off stick position data
MISFIRE_COUNT equ 50 ; Noise filter count to ensure the reverse spin
Slowest_Spin_Speed_Check_Time equ 60 ; SPIN_FREE check time value. Used Timer0 high
FIND_TIMER_DELAY equ 36 ; find timer start delay after throttle off(ex.value 24: 24 x 8sec=3min)
;RX_NOISE_TIM_CNT equ 10 ; the Rx noise as throttle off signal timer counter setting data
STICK_BACK_HYS equ 2 ; return back stick hyteresis to avoid RX signal jitter
MIN_OFFSET equ 1150 ; uS. minimum control pulse width offset
CTRL_MIN equ 2347 ; *MIN_OFFSET/0.49(=12/SYSCLK); number of timer counts PCA 1/12 sys.clk in
; capture range sample(0800h - 1065h)
ZERO_CROSS_INIT_STEPS equ 7 ; initial ZC_STEPS value as stick to ou-duty time in zerocross mode.
ZC_SAMPLING_DUTY_INC_TIMING equ 10 ; power-step up increasing timing on Timer 3 in zerocross mode.
V_ERR_MAX equ 200 ; The voltage error detection value for V_ERR_CNT
MAX_BEMF_RPM_DATA_CHECK_HIGHER equ 2 ; <<<<<<<
;-----------------------------------------------------------------------------RX_IN equ P0.7 ; Control pulse input from Rx.
COMP_D equ R0 ; Comparator result strage
; R1 is partially used for find buzzer timer,
; timing advance counter in full on mode
; and single sample duty calc.
;R2 ; Partially used in sound and stepping start sequence, single sample duty calc.
;R1 ; timing advance high byte data strage
;R2 ; timing advance low byte data strage
TEMP3 equ R3
RX_ERROR_COUNT equ R4 ; RX throttle off signal counter to avoid Rx noise motor shut off
ON_DUTY equ R5 ; ON duty control data storage
TEMP0 equ R6 ;
; BRAKING_TIMER is used for braking timer
;TEMP equ R7 ; Just temporally register
;STACKs
IO_SETTING equ 01ah ; P1 setting storage while motor 3ST OFF to Re-On in BEMF running
DIVIDED_L equ 01bh ; Timer low byte storage for devide calc
DIVIDED_H equ 01ch ; Timer high byte storage for devide calc
P0_IO equ 01dh ; P0 IO storage used in stepping sequence
STEPPING_ON_DUTY equ 01eh ; Used for starting on-duty timing up with current limit function
STEPPING_ON_DUTY_CHOPPING_COUNTER equ 01fh ; Used for starting current limited on-duty timing
PCA0_CAP_L equ 020h ; PCA low byte holding register at the rising edge of speed control input from Rx
PCA0_CAP_H equ 021h ; PCA high byte holding register at the rising edge of speed control input from Rx
PULSE_WIDTH_L equ 022h ; measured pulse width low byte data storage(12bits resolution)
PULSE_WIDTH_H equ 023h ; measured pulse width high byte data storage(12bits resolution)
CONTROL_DATA_L equ 024h ; The data storage of checked low byte of 12bit resolution input control pulse width
CONTROL_DATA_H equ 025h ; The data storage of checked High byte of 12bit resolution input control pulse width
CONTROL_DATA equ 026h ; The data storage of 8bit resolution input control pulse width
SAMPLING_COUNTER_L equ 027h ; sampling counter at one phase drive
SAMPLING_COUNTER_H equ 028h
TEMP_MEMORY equ 029h ; Just TEMP memory
BRAKING_TIMER equ 02ah ; is used for braking timer
; On/Off duty timing data memory in BEMF mode
RX_NOISE_FILTER_COUNTER equ 02bh; SPIN COUTER for ZC => BEMF mode Rx noise filtering
Rx_Noise_Count equ 20 ; Almost 0.1 sec noise count to avoid immediate stop for PPM noisy Rx
TMR1L equ 030h ; Storage space for when single sample to BEMF sampling back 1 phase frame timing data
TMR1H equ 031h
INPUT_COUNTER_L equ 032h ; This counter is used for input signal loss check
INPUT_COUNTER_H equ 033h ; This counter is used for input signal loss check
ROUND_CHK_FLAG equ 034h
PREV_COMP_D equ 035h
;T2_LOWEST_L equ 036h ; BEMF max speed one phase spin timing as single sample min. spin timing
;T2_LOWEST_H equ 037h ; BEMF max speed one phase spin timing as single sample min. spin timing
BEMF_OFF_EXT_TIMER equ 038h
BEMF_FULL_ON equ 039h
SPIN_COUNTER equ 03ah ; Spin counter
T2_ON_DUTY_LOW equ 03bh ; set on_duty timer low storage SS mode RAM
T2_ON_DUTY_HIGH equ 03ch ; set on_duty timer high storage SS mode RAM
STORAGE_B equ 03dh ; Stack for AccB
SPIN_MODE equ 03eh ; BEMF START mode(unstable):3
; BEMF stable run mode(as 5 or less BEMF samples in one state):2
; BEFM very high speed critical mode(as one BEMF sample in one state):1
; Zero Cross mode:0
DRV_SEQUENCE_CHECK_ENABLE equ 03fh ; flag
CURRENT_LIMITER_ENABLE_FLAG equ 040h ; "1" Eanble, "0" Disable for BEMF<->Zerocross one shot rush current enable
ZC_STEPS equ 041h ; zero cross stick timing resolution
COMP1_A equ 042h ; comparator result temporaly storage
COMP1_B equ 043h ; comparator result temporaly storage
COMP1_C equ 044h ; comparator result temporaly storage
;ZC_BREAK_IN_COUNTER equ 045h ; BEMF Duty 50% run to stable half power before starting ZC control.
STEP_START_FLAG equ 046h ; Stepping start flag to control small on-duty just after stepping start.
ZC_OFF_DUTY_L equ 047h
ZC_OFF_DUTY_H equ 048h
;NEED_MORE_T_ADVANCE_FLAG equ 049h
BEMF_OFF_DUTY_TIME_L equ 04ah ; used in BEMF power timing check
BEMF_OFF_DUTY_TIME_H equ 04bh ; used in BEMF power timing check
BEMF_DUTY_TIME_L equ 04ch ; used in BEMF power timing check
BEMF_DUTY_TIME_H equ 04dh ; used in BEMF power timing check
;ADVANCE_ENABLE equ 04ch ; used for Timing advance enable flag.
BEMF_PWR_OVER_CHECK_COUNTER equ 04eh
ACCELERATION_CKECK_AVERAGE_FILTER_COUNTER equ 04fh ; used for BEMF increasing speed up check enable flag
MISFIRE_COUNTER equ 050h ; mis-fire counter as reverse spin.
PACK equ 051h ; 2 or 3 Li-Po Package detection result(2=2PACK, 3=3PACK)
AD_SEQUENCE equ 052h ; Voltage and temprature check ad conversion sequence flag
CONTROL_DATA_MAX equ 053h ; for decreasing stick power limit at Li-Po voltage down and/or Li-Po or CPU over heat
FIND_TIMER equ 054h ; plane find buzzer timer counter
TMR2M_H equ 056h ; rear edge of inductive kick T2 high data storage to check the weak motor generative volage p-p level in zero cross
TMR2M_L equ 057h ; rear edge of inductive kick T2 low data storage to check the weak motor generative volage p-p level in zero cross
LIPO_T_ERR_CNT equ 058h ; the over heat counter
W_TERMINAL_V_CHK_FLAG equ 059h ; check Vdd line voltage throough P-ch W-state MOSFET ON
TOP_V_ERR_CNT equ 05ah ; the top cell voltage down counter
V2_ERR_CNT equ 05bh ; The GND to cell2 volatge drop counter to avoid shot voltage dip.
CHK_TOP_V_SEQUENCE equ 05ch ;top cell as pack voltage check sequence counter
TOP_V_LOW equ 05dh ; Top voltage low data stored here
TOP_V_HIGH equ 05eh ; Top voltage high data stored here
V1_ERR_CNT equ 05fh ; The bottom cell volatge drop counter to avoid shot voltage dip.
V3_ERR_CNT equ 060h ; The Top cell volatge drop counter to avoid shot voltage dip in 3S mode.
MID_CELL_DIP_CNT equ 061h ; bottom cell to middle cell volatge drop counter to avoid shot voltage dip.
DRIVE_STATE equ 062h ; drive state storage
START_DRIVE_STATE equ 063h ;
PREV_DRIVE_STATE equ 064h ; Previous drive state storage
PREV_DRV_STATE equ 065h ; previous drive state storage in stepping start control
NEXT_DRV_STATE equ 066h ; next drive state storage in stepping start control fpr reverse spin check
NEXT_NEXT_DRV_STATE equ 067h ; next next drive state storage in stepping start control fpr reverse spin check
COMP_REMEASURE_COUNTER equ 068h
COMP_PD equ 070h ; comparator previous data strage to avoid oscillation
TEMP1 equ 071h ; Used in timing delay routine
TEMP_L equ 072h ; 16 bit calc temporaly storage low
TEMP4 equ 074h ; Used in Rx pulse width counter in interrup routine
TEMP5 equ 075h
TEMP_H equ 076h ; 16 bit calc temporaly storage low
TEMP7 equ 077h ; 1st BEMF running(bit0), brake ON flag(bit1), BEMP direction check flag(bit2,3)
; # of sampling in one phase is OK=1 flag(bit4), over mask time flag(bit5),
; ZERO cross timing is OK=1 fkg(bit6), BAD comparator flag(bit7)
DUTY equ 078h ; Temp. Used in BEMF run power duty control timer routine
IO_MODE_M equ 079h ; P1 mode setting storage while motor 3ST OFF to Re-On in BEMF running
;-----------------------------------------------------------------------------; RESET and INTERRUPT VECTORS;-----------------------------------------------------------------------------;Reset Vector cseg AT 0
ljmp Main ; Locate a jump to the start of code at the reset vector.
org 005bh
ljmp PCA0_PLS ; Uses about 6uS. PCA0 Mode0 plus pulse width count capture interrupt;-----------------------------------------------------------------------------; CODE SEGMENT;-----------------------------------------------------------------------------BL_ESC segment CODE
rseg BL_ESC ; Switch to this code segment.
using 0 ; Specify register bank for the following program code.
Main:
; Disable the WDT.
anl PCA0MD, #NOT(040h) ; clear Watchdog Enable bit and 1/12 system clock usage for PCA
mov OSCICN, #10000011b ; make 24.5MHz run
;-------------------------------------
INIT: mov PULSE_WIDTH_L,#0 ; Init. control pulse data
mov PULSE_WIDTH_H,#0
mov CONTROL_DATA, #0 ; Init. Rx input pulse width data
mov TEMP7, #0 ; 1st BEMF running(bit-0) and brake ON flag(bit-1) clear
mov RX_ERROR_COUNT, #0
mov ROUND_CHK_FLAG, #0 ; Clear the BEMF running monitor flag
mov TMR3RLL, #0
mov TMR3RLH, #0
mov BEMF_FULL_ON, #BEMF_MAX_ON_DUTY ;
mov DIVIDED_H, #255
orl TMR3CN, #00000100b ; start T3 count-up used in BEMF 50% power timing check and zero cross power increase timing
mov TMOD, #00010001b ; Set Timer0,1 16 bit counter mode
mov DRV_SEQUENCE_CHECK_ENABLE, #0 ; starting routine uses complimentary sequence to avoid shaft spin
mov ZC_STEPS, #ZERO_CROSS_INIT_STEPS
mov TEMP_L, #255
mov TEMP_H, #255
;mov CONTROL_DATA_MAX, #THROTTLE_OFF+2
mov CONTROL_DATA_MAX, #255
mov TMR1L, #255
mov TMR1H, #255
mov AD_SEQUENCE, #0
mov LIPO_T_ERR_CNT, #0
mov V1_ERR_CNT, #0
mov V2_ERR_CNT, #0
mov V3_ERR_CNT, #0
mov W_TERMINAL_V_CHK_FLAG, #0
mov CHK_TOP_V_SEQUENCE, #0
mov CURRENT_LIMITER_ENABLE_FLAG, #1 ; Enable
mov MISFIRE_COUNTER, #0
;mov ZC_BREAK_IN_COUNTER, #0
;mov NEED_MORE_T_ADVANCE_FLAG, #0
mov ACCELERATION_CKECK_AVERAGE_FILTER_COUNTER, #127 ; Checking BEMF max speed enable (avaraging) flag
mov BEMF_PWR_OVER_CHECK_COUNTER, #0
;--------------------
mov PCA0CPL2, #255 ; wathc dog timing is 32mS interval
orl PCA0MD, #11000000b ; PCA suspend while CPU is supended and WDT is "ON".
;clr P2.0 ; Test pin "L"
setb P2.0 ; P2.0 pin "H" with open drain
ADC_Init:
mov ADC0CF, #00111000b ; 3MHz AD SAR CLOCK, right justified
setb AD0EN ; enable ADC
Voltage_Reference_Init:
mov REF0CN, #00Eh
; Peripheral specific initialization functions,
Port_IO_Init:
; P0.0 - Skipped, Open-Drain, Analog
; P0.1 - Skipped, Open-Drain, D/A output Analog
; P0.2 - Skipped, Open-Drain, Analog
; P0.3 - Skipped, Open-Drain, Analog
; P0.4 - Skipped, Open-Drain, Analog
; P0.5 - Skipped, Open-Drain, Analog
; P0.6 - Skipped, Push-Pull, Digital
; P0.7 - CEX0 (PCA), Open-Drain, Digital
; P1.0 - Skipped, Push-Pull, Digital
; P1.1 - Skipped, Open-Drain, Analog
; P1.2 - Skipped, Open-Drain, Analog
; P1.3 - Skipped, Open-Drain, Analog
; P1.4 - Unassigned, Push-Pull, Digital
; P1.5 - Unassigned, Push-Pull, Digital
; P1.6 - Unassigned, Push-Pull, Digital
; P1.7 - Unassigned, Push-Pull, Digital
call SPIN_FREE ; <<<<<<<<<<<<<
mov P0MDIN, #0C0h
mov P1MDIN, #0F1h
mov P0MDOUT, #040h
mov P1MDOUT, #0F1h
mov P2MDOUT, #001h
mov P0SKIP, #07Fh
mov P1SKIP, #00Fh
mov XBR1, #041h
DAC_Init:
mov IDA0CN, #0F2h
; mov XBR1, #11000001b ; no weak pull-ups, cross bar enabled on out put pins, CEX0 routed to Port pin.
; All out puts are "L", just after RESET.
mov CPT0CN, #10000000b ; bit7: Comp. Enable, bit6: Comp out, bit5,4: no interrupt, bit3-0: no hys.
; Timer0,1 16bit counter with pre-scaled system clock is 1/48=1960nS.<<<<<<<<<<<<<<<<
T01_SET: orl CKCON, #00000010b
PCA0_INT: ; Programable Counter Array is used in Edge-triggered Caputure Mode for power control input from Rx.
orl PCA0CN, #01000000b ; Run Programmable Counter 0
;mov PCA0MD, #00000000b ; PCA0 works in 1/12 system clock
orl PCA0CPM0, #00100001b ; PCA0 is captured by positive edge first on P0.7, Also generates the interrupt.
orl EIE1, #00010000b ; enable PCA0 interrupts
clr CCF0 ; clear PCA0 module0 interrupt flag
; orl EIP1,#00010000b ; PCA0 innterrupt set to high priority level.
call WAKE_UP_CP ; wait for comparator wake up.
setb EA ; enable global interrupts
;--------------------
PWR_ON_SOUND:
SOUND_1 equ 1 ; Sound frame time
;************************************
SND_ON_DUTY equ 200 ; Sound pitch
;************************************
mov TEMP3, #SOUND_1 ;
mov TEMP5, #SND_ON_DUTY ;
call SOUNDER
call NO_SOUND_TIM
mov TEMP3, #SOUND_1 ;
mov TEMP5, #SND_ON_DUTY ;
call SOUNDER
call NO_SOUND_TIM
mov TEMP3, #SOUND_1 ;
mov TEMP5, #SND_ON_DUTY ;
call SOUNDER
call NO_SOUND_TIM
;****************************************************************
;PACK_TEST: call LIPO_2S_3S_CHK ; Test the P0.6 voltage for 2 or 3 Li-Po pack detection
;****************************************************************
GET_INPUT_PULSE:
call SPIN_FREE ; make the outputs are open drain as 3-Sate open to reduce the SW noise
FIND_BUZZER_INT:
mov TEMP0, #0 ; clear T2 repeat counter as TEMP0
;mov FIND_TIMER, #1 ; TEST ONLY: T2 x TEMP0 x FIND_TIMER timer(8 sec.)
mov FIND_TIMER, #FIND_TIMER_DELAY ; T2 x TEMP0 x FIND_TIMER timer(x 8sec.) ; BUG found on Mar. 17,
call START_T2 ; clear T2 counter 32mS
;-----------------
THROTTLE_POS_CHK:
call WDT_OFF
mov a, CONTROL_DATA ; Get Rx input pulse
BRAKE_SET_CHK: clr c
subb a, #060h ; Almost Full throttle?
jnc BRAKE_FLAG_ON ; Yes. Then Brake fuction ON
jmp THROTTLE_OFF_CHK
BRAKE_FLAG_ON:
orl TEMP7, #00000010b ; Turn on Brake_ON flag
THROTTLE_OFF_CHK:
call WDT_OFF
mov a, CONTROL_DATA ; Get Rx input pulse
jz THROTTLE_OFF_CHK ; wait for first Rx pulse
clr c
subb a, #THROTTLE_OFF ; wait for throttle OFF position
jc READY_SOUND ; Is the input pulse less than 940uS?
jmp THROTTLE_OFF_CHK ; No.
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