jitcodesched.c

This is a resource based on j2me embedded,if you dont understand,you can connection with me .

     * of status bits should be next of this instruction.
     */
    if (CVMJITcsIsStatusInstruction(con)) {
        CVMJITcsStatusPC(con) = 
	    MAX(CVMJITcsStatusPC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The earliest place of the next instruction which has the dependency
     * of exception bits should be next of this instruction.
     */
    if (CVMJITcsIsExceptionInstruction(con)) {
        CVMJITcsBranchPC(con) =
	    MAX(CVMJITcsBranchPC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The earliest place of the next instruction which has the dependency of 
     * put static field bits should be next of this instruction.
     */
    if (CVMJITcsIsPutStaticFieldInstruction(con)) {
        CVMJITcsPutStaticFieldPC(con) = 
	    MAX(CVMJITcsPutStaticFieldPC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The earliest place of the next instruction which has the dependency of 
     * get static field instruction should be next of this instruction.
     */
    if (CVMJITcsIsGetStaticFieldInstruction(con)) {
        CVMJITcsGetStaticFieldPC(con) =
	    MAX(CVMJITcsGetStaticFieldPC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The earliest place of the next instruction which has the dependency of 
     * branch instruction should be next of this instruction.
     * Note: as some register will flow to other block. Any instruction which 
     * modifies these registers is not allowed to be scheduling before the
     * branch instruction. Updating the defining register score board can
     * prevent such case.
     * SP, JSP, JFP are global visible registers.
     */
    if (CVMJITcsIsBranchInstruction(con)) {
        CVMassert(CVMJITcsOutGoingRegisters(con, CVMCPU_JSP_REG) == CVM_TRUE);
        CVMassert(CVMJITcsOutGoingRegisters(con, CVMCPU_JFP_REG) == CVM_TRUE);
        CVMassert(CVMJITcsOutGoingRegisters(con, CVMCPU_SP_REG) == CVM_TRUE);
        CVMJITcsBranchPC(con) = 
	    MAX(CVMJITcsBranchPC(con), 
		instructionLogicalPC + sizeof(CVMCPUInstruction));
        for (i = 0; i < CVM_CPU_NUM_REGISTERS; i++) {
	    if (CVMJITcsOutGoingRegisters(con, i)) {
		CVMJITcsUseRegisterPC(con, i) =
                    instructionLogicalPC + sizeof(CVMCPUInstruction);
	    }
	    CVMJITcsOutGoingRegisters(con, i) = CVM_FALSE;
        }
        CVMJITcsOutGoingRegisters(con, CVMCPU_JSP_REG) = CVM_TRUE;
        CVMJITcsOutGoingRegisters(con, CVMCPU_JFP_REG) = CVM_TRUE;
        CVMJITcsOutGoingRegisters(con, CVMCPU_SP_REG) = CVM_TRUE;
    }

    /*
     * The earliest place of the next instruction which has the dependency of 
     * store instruction should be next of this instruction.
     */
    if (CVMJITcsIsStoreInstruction(con)) {
        CVMJITcsStorePC(con) = 
	    MAX(CVMJITcsStorePC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The following two if statements targets on updating the destination 
     * register score board.
     */
    if ((CVMJITcsDestRegister(con) != CVMCPU_INVALID_REG) &&
	!CVMJITcsIsEmitPatchInstruction(con))
    {
        CVMassert((CVMJITcsIsEmitInPlace(con)) ||
		  (registerPC >=
		   CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister(con))));
        CVMJITcsDefRegisterPC(con, CVMJITcsDestRegister(con)) = registerPC;
        CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister(con)) =
	    MAX(CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister(con)),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }
    
    if ((CVMJITcsDestRegister2(con) != CVMCPU_INVALID_REG) &&
         !CVMJITcsIsEmitPatchInstruction(con))
    {
        CVMassert((CVMJITcsIsEmitInPlace(con)) ||
		  (registerPC >= 
		   CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister2(con))));
        CVMJITcsDefRegisterPC(con, CVMJITcsDestRegister2(con)) = 
	    instructionLogicalPC + sizeof(CVMCPUInstruction);
        CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister2(con)) =
	    MAX(CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister2(con)),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The following if statements targets on updating the source 
     * register score board.
     */
    for (i = 0; i < CVMJITcsSourceRegsNum(con); i++) {
	CVMJITcsUseRegisterPC(con, CVMJITcsSourceRegister(con, i)) = 
	    MAX(CVMJITcsUseRegisterPC(con, CVMJITcsSourceRegister(con, i)),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The following two if statements target on frame based load/store score
     * board updating.
     */
    if (CVMJITcsIsStoreInstruction(con) &&
        (CVMJITcsBaseRegister(con) == CVMCPU_JFP_REG) &&
        (CVMJITcsJavaFrameIndex(con) >= 0) &&
        (CVMJITcsJavaFrameIndex(con) <
	 CVMJITCS_TEMP_LOCAL_NUM * con->numberLocalWords))
    {
        CVMJITcsDefJavaFrameBasedReferencePC(con, CVMJITcsJavaFrameIndex(con))=
            instructionLogicalPC + sizeof(CVMCPUInstruction);
    }

    if ((CVMJITcsIsLoadInstruction(con)) &&
        (CVMJITcsBaseRegister(con) == CVMCPU_JFP_REG) &&
        (CVMJITcsJavaFrameIndex(con) >= 0) &&
        (CVMJITcsJavaFrameIndex(con) <
	 CVMJITCS_TEMP_LOCAL_NUM * con->numberLocalWords))
    {
        CVMJITcsUseJavaFrameBasedReferencePC(con, CVMJITcsJavaFrameIndex(con))=
	    instructionLogicalPC + sizeof(CVMCPUInstruction);
    }

    /*
     * The earliest place of the next instruction which has the
     * dependency of compare instruction (set status bits) should be
     * next of this instruction.
     */
    if (CVMJITcsIsCompareInstruction(con)) {
	CVMJITcsComparePC(con) =
	    MAX(CVMJITcsComparePC(con),
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * The following four if statements targets on update get/put
     * field, get/store array score board.
     */
    if (CVMJITcsIsPutFieldInstruction(con)) {
	CVMJITcsPutFieldPC(con) = 
	    MAX(CVMJITcsPutFieldPC(con), 
		instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    if (CVMJITcsIsGetFieldInstruction(con)) {
          CVMJITcsGetFieldPC(con) = 
	      MAX(CVMJITcsGetFieldPC(con), 
		 instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    if (CVMJITcsIsPutArrayInstruction(con)) {
          CVMJITcsPutArrayElementPC(con) =
	      MAX(CVMJITcsPutArrayElementPC(con),
                 instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    if (CVMJITcsIsGetArrayInstruction(con)) {
          CVMJITcsGetArrayElementPC(con) = 
	      MAX(CVMJITcsGetArrayElementPC(con), 
		 instructionLogicalPC + sizeof(CVMCPUInstruction));
    }

    /*
     * reset all the transition fields
     */
    CVMJITcsClearInstructionFlags(con);
    CVMJITcsSetEmitInsertInstruction(con);
    CVMJITcsSourceRegsNum(con) = 0;
    CVMJITcsDestRegister(con) = CVMCPU_INVALID_REG;
    CVMJITcsDestRegister2(con) = CVMCPU_INVALID_REG;
    CVMJITcsJavaFrameIndex(con) = -1;
}

CVMInt32 
CVMJITcsCalcInstructionPos(CVMJITCompilationContext* con)
{
    CVMInt32 i;
    CVMInt32 instructionPC = 0;

    if (CVMJITcsIsEmitPatchInstruction(con)) {
	return CVMJITcbufGetLogicalInstructionPC(con);
    }

    if (CVMJITcsIsEmitInPlace(con)) {
	instructionPC = CVMJITcbufGetLogicalPC(con);
	CVMJITcbufGetLogicalPC(con) += sizeof(CVMCPUInstruction);
	CVMJITcbufGetPhysicalPC(con) = 
	    CVMJITcbufLogicalToPhysical(con, CVMJITcbufGetLogicalPC(con));
	CVMJITcbufGetLogicalInstructionPC(con) = instructionPC;
	return instructionPC;
    }

    CVMassert(CVMJITcsIsEmitInsertInstruction(con));
    if ((CVMJITcsIsBranchInstruction(con))) {
	instructionPC = MAX(instructionPC, CVMJITcsBranchPC(con));
	instructionPC = MAX(instructionPC, CVMJITcsStorePC(con));
    }

    if (CVMJITcsIsExceptionInstruction(con)) {
	instructionPC = MAX(instructionPC, CVMJITcsBranchPC(con));
	instructionPC = MAX(instructionPC, CVMJITcsStorePC(con));
    }

    if ((CVMJITcsIsStoreInstruction(con))) {
	instructionPC = MAX(instructionPC, CVMJITcsBranchPC(con));
    }

    if ((CVMJITcsBaseRegister(con) == CVMCPU_JFP_REG)) {
        if ((CVMJITcsIsStoreInstruction(con))) {
	    CVMassert(CVMJITcsJavaFrameIndex(con) >= 0);
	    CVMassert(CVMJITcsJavaFrameIndex(con) <
		      CVMJITCS_TEMP_LOCAL_NUM * con->numberLocalWords);
	    instructionPC = MAX(instructionPC,
				CVMJITcsUseJavaFrameBasedReferencePC(
		        	    con, CVMJITcsJavaFrameIndex(con)));
	    instructionPC = MAX(instructionPC,
				CVMJITcsDefJavaFrameBasedReferencePC(
	        		    con, CVMJITcsJavaFrameIndex(con)));
        } else if ((CVMJITcsIsLoadInstruction(con))) {
	    CVMassert(CVMJITcsJavaFrameIndex(con) >= 0);
	    CVMassert(CVMJITcsJavaFrameIndex(con) <
		      CVMJITCS_TEMP_LOCAL_NUM * con->numberLocalWords);
	    instructionPC = MAX(instructionPC,
				CVMJITcsDefJavaFrameBasedReferencePC(
	         		    con, CVMJITcsJavaFrameIndex(con)));
        } 
    }

    CVMassert(CVMJITcsSourceRegsNum(con) < 4);
    CVMassert(CVMJITcsSourceRegsNum(con) >= 0);

    for (i = 0; i < CVMJITcsSourceRegsNum(con); i++) {
	CVMassert(CVMJITcsSourceRegister(con, i) != CVMCPU_INVALID_REG);
	instructionPC =
	    MAX(instructionPC,
		CVMJITcsDefRegisterPC(con, CVMJITcsSourceRegister(con, i)));
    }

    if (CVMJITcsDestRegister(con) != CVMCPU_INVALID_REG) {
	instructionPC =
	    MAX(instructionPC,
		CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister(con)));
    }

    if (CVMJITcsDestRegister2(con) != CVMCPU_INVALID_REG) {
	instructionPC =
	    MAX(instructionPC,
		CVMJITcsUseRegisterPC(con, CVMJITcsDestRegister2(con)));
    }

    if (CVMJITcsIsCompareInstruction(con)) {
	instructionPC = MAX(instructionPC, CVMJITcsStatusPC(con));
    }

    if (CVMJITcsIsStatusInstruction(con) || con->inConditionalCode) {
	instructionPC = MAX(instructionPC, CVMJITcsComparePC(con));
    }

    if (CVMJITcsIsPutFieldInstruction(con)){
	instructionPC = MAX(instructionPC, CVMJITcsGetFieldPC(con));
	instructionPC = MAX(instructionPC, CVMJITcsPutFieldPC(con));;
    } else if (CVMJITcsIsGetFieldInstruction(con)){
	instructionPC = MAX(instructionPC, CVMJITcsPutFieldPC(con));
    } else if (CVMJITcsIsPutArrayInstruction(con)){
	instructionPC = MAX(instructionPC, CVMJITcsPutArrayElementPC(con));
	instructionPC = MAX(instructionPC, CVMJITcsGetArrayElementPC(con));
    } else if (CVMJITcsIsGetArrayInstruction(con)){
	instructionPC = MAX(instructionPC, CVMJITcsPutArrayElementPC(con));
    } else if ((CVMJITcsIsPutStaticFieldInstruction(con))) {
	instructionPC = MAX(instructionPC, CVMJITcsPutStaticFieldPC(con));
	instructionPC = MAX(instructionPC, CVMJITcsGetStaticFieldPC(con));
    } else if ((CVMJITcsIsGetStaticFieldInstruction(con))) {
	instructionPC = MAX(instructionPC, CVMJITcsPutStaticFieldPC(con));
    } 

    while(instructionPC < CVMJITcbufGetLogicalPC(con)) {
	if (*(CVMCPUInstruction*)
	    CVMJITcbufLogicalToPhysical(con, instructionPC) ==
	    CVMJITcsContext(con)->nop)
	{
	    break;
	}
	instructionPC += sizeof(CVMCPUInstruction);
    }

    if (instructionPC >= CVMJITcbufGetLogicalPC(con)) {
	for (i = CVMJITcbufGetLogicalPC(con); 
	     i <= instructionPC; 
	     i += sizeof(CVMCPUInstruction))
	{
	    CVMJITcbufEmitPC(con, i, CVMJITcsContext(con)->nop);
	}

	CVMJITcbufGetLogicalPC(con) =
	    instructionPC + sizeof(CVMCPUInstruction);
	CVMJITcbufGetPhysicalPC(con) =
	    CVMJITcbufLogicalToPhysical(
		con, instructionPC + sizeof(CVMCPUInstruction));
    }

    CVMJITcbufGetLogicalInstructionPC(con) = instructionPC;

    return instructionPC;
}