📄 jitcodesched.c
字号:
} else if (CVMARMisLdrInstruction(*curPhysicalPC)) { CVMARMLdrStrInstruction ldrInstruction; ldrInstruction.u.instr = *curPhysicalPC; if ((ldrInstruction.u.ldrInstructionBits.Rn == CVMARM_PC)&& (ldrInstruction.u.ldrInstructionBits.bit25 == 0)) { CVMUint32 targetAddress = CVMARMgetLdrTargetOffsetAddress(ldrInstruction) + curLogicalPC + 8; CVMJITcsPushInstruction(con, CVMJIT_MEMSPEC_ADDRESS_MODE, CVMJITcbufGetLogicalPC(con), targetAddress); } } CVMJITcbufGetLogicalPC(con) += sizeof(CVMCPUInstruction); } } for (curLogicalPC = constantPoolEntries[curConstantPoolEntryIndex + 1].startPC; curLogicalPC < constantPoolEntries[curConstantPoolEntryIndex + 1].endPC; curLogicalPC += sizeof(CVMCPUInstruction)) { CVMCPUInstruction* targetPhysicalPC = (CVMCPUInstruction*) CVMJITcbufLogicalToPhysical(con, CVMJITcbufGetLogicalPC(con)); CVMCPUInstruction* curPhysicalPC = (CVMCPUInstruction*) CVMJITcbufLogicalToPhysical(con, curLogicalPC); *targetPhysicalPC = *curPhysicalPC; CVMJITcbufGetLogicalPC(con) += sizeof(CVMCPUInstruction); } } CVMJITcsPushNOPInstruction(con, endAddress); /* * MAP_PC table */ NOPs = CVMJITgarrGetElems(con, CVMJITcsNopsArray(con));#ifdef CVM_TRACE_JIT CVMtraceJITCodegen(("Begin dumping Nops\n")); numOfNops = CVMJITgarrGetNumElems(con, CVMJITcsNopsArray(con)); for (i = 0; i < numOfNops; i++) { CVMtraceJITCodegen(("Nops: %d\n", NOPs[i])); } CVMtraceJITCodegen(("End dumping Nops\n"));#endif numOfNopsCounted = 0; for (i = 0; i < con->pcMapTable->numEntries; i++) { for(; con->pcMapTable->maps[i].compiledPc > NOPs[numOfNopsCounted]; numOfNopsCounted++); con->pcMapTable->maps[i].compiledPc -= (numOfNopsCounted)*sizeof(CVMCPUInstruction); }#ifdef CVM_TRACE_JIT for (i = 0; i < con->pcMapTable->numEntries; i++) { CVMtraceJITCodegen(("MAP_PC javaPc=%d compiledPc=%d\n", con->pcMapTable->maps[i].javaPc, con->pcMapTable->maps[i].compiledPc)); }#endif/* * Stack MAP table */#ifdef CVM_TRACE_JIT for (smap = con->stackmapList; smap != NULL; smap = smap->next) { CVMtraceJITCodegen(("StackMap pcOffset=%d\n", smap->pcOffset - (con->codeEntry - con->codeBufAddr))); }#endif numOfNopsCounted = 0; for (smap = con->stackmapList; smap != NULL; smap = smap->next) { for(; smap->pcOffset > NOPs[numOfNopsCounted]; numOfNopsCounted++); smap->pcOffset -= (numOfNopsCounted) * sizeof(CVMCPUInstruction); }#ifdef CVM_TRACE_JIT for (smap = con->stackmapList; smap != NULL; smap = smap->next) { CVMtraceJITCodegen(("Fixed stackMap pcOffset=%d\n", smap->pcOffset - (con->codeEntry - con->codeBufAddr))); }#endif /* * pactchInstruction */#ifdef CVM_TRACE_JIT for (i = 0; i < con->gcCheckPcsSize; i++) { CVMtraceJITCodegen(("gc check pc:%d\n", con->gcCheckPcs->pcEntries[i] - (con->codeEntry - con->codeBufAddr))); }#endif numOfNopsCounted = 0; patchedInstructions = (CVMCPUInstruction*) (((CVMUint32)&con->gcCheckPcs->pcEntries[con->gcCheckPcsSize] + sizeof(CVMCPUInstruction) - 1) & ~(sizeof(CVMCPUInstruction)-1)); for (i = 0; i < con->gcCheckPcsSize; i++) { if (con->gcCheckPcs->pcEntries[i] != 0) { CVMUint32 numOfNopsCountedForTargetAddress; CVMUint32 targetAddress = CVMARMgetBranchTargetOffsetAddress(patchedInstructions[i]) + con->gcCheckPcs->pcEntries[i] - (con->codeEntry - con->codeBufAddr) + 8; for(; (con->gcCheckPcs->pcEntries[i] - (con->codeEntry - con->codeBufAddr)) > NOPs[numOfNopsCounted]; numOfNopsCounted++); con->gcCheckPcs->pcEntries[i] -= (numOfNopsCounted)*sizeof(CVMCPUInstruction); if (targetAddress > startAddress && targetAddress < endAddress) { for(numOfNopsCountedForTargetAddress= 0; targetAddress > NOPs[numOfNopsCountedForTargetAddress]; numOfNopsCountedForTargetAddress++); targetAddress -= numOfNopsCountedForTargetAddress*sizeof(CVMCPUInstruction); } patchedInstructions[i] = CVMCPUfixupInstructionAddress(con, patchedInstructions[i], con->gcCheckPcs->pcEntries[i] - (con->codeEntry - con->codeBufAddr), targetAddress, CVMJIT_BRANCH_ADDRESS_MODE); } } /* * Inlining Table */ for (i = 0; i < con->numInliningInfoEntries; i++) { numOfNopsCounted = 0; for(; con->inliningInfo->entries[i].pcOffset1 > NOPs[numOfNopsCounted]; numOfNopsCounted++); con->inliningInfo->entries[i].pcOffset1 -= (numOfNopsCounted)*sizeof(CVMCPUInstruction); for(; con->inliningInfo->entries[i].pcOffset2 > NOPs[numOfNopsCounted]; numOfNopsCounted++); con->inliningInfo->entries[i].pcOffset2 -= (numOfNopsCounted)*sizeof(CVMCPUInstruction); } /* * branch and ldr instruction */ for (i = 0; i < CVMJITcsTopOfInstructions(con); i++) { for (numOfNopsCounted = 0; CVMJITCSInstructionStack(con)[i].targetAddress > NOPs[numOfNopsCounted]; numOfNopsCounted++); CVMJITCSInstructionStack(con)[i].targetAddress -= numOfNopsCounted * sizeof(CVMCPUInstruction); CVMJITfixupAddress(con, CVMJITCSInstructionStack(con)[i].logicalPC, CVMJITCSInstructionStack(con)[i].targetAddress, CVMJITCSInstructionStack(con)[i].flags); } for (numOfNopsCounted = 0; con->intToCompOffset > NOPs[numOfNopsCounted]; numOfNopsCounted++); con->intToCompOffset -= numOfNopsCounted * sizeof(CVMCPUInstruction); /* * Fix the cached constant (checkcast and instanceOf) instructions */#ifdef IAI_CACHEDCONSTANT thisEntry = GET_CONSTANT_POOL_LIST_HEAD(con); while(thisEntry != NULL) { if (thisEntry->isCachedConstant) { thisRef = thisEntry->references; for (numOfNopsCounted = 0; thisEntry->address > NOPs[numOfNopsCounted]; numOfNopsCounted++); thisEntry->address -= numOfNopsCounted * sizeof(CVMCPUInstruction); for (numOfNopsCounted = 0; thisRef->logicalAddress > NOPs[numOfNopsCounted]; numOfNopsCounted++); thisRef->logicalAddress -= numOfNopsCounted * sizeof(CVMCPUInstruction); CVMJITcsSetEmitInPlace(con); CVMtraceJITCodegen(( ":::::Fixed instruction at %d to reference %d\n", thisRef->logicalAddress, thisEntry->address)); CVMJITcbufPushFixup(con, thisRef->logicalAddress); CVMJITemitLoadConstantAddress(con, thisEntry->address); CVMJITcbufPop(con); CVMJITcsClearEmitInPlace(con); } thisEntry = thisEntry->next; }#endif CVMJITcbufGetPhysicalPC(con) = CVMJITcbufLogicalToPhysical(con, CVMJITcbufGetLogicalPC(con));}void CVMJITcsInit(CVMJITCompilationContext* con){ int i; CVMJITcsGetFieldPC(con) = 0; CVMJITcsPutFieldPC(con) = 0; CVMJITcsGetArrayElementPC(con) = 0; CVMJITcsPutArrayElementPC(con) = 0;#ifdef CVM_DEBUG if (CVMglobals.jit.codeSchedRemoveNOP) { CVMJITcsContext(con)->nop = CVMCPU_NOP2_INSTRUCTION; } else { CVMJITcsContext(con)->nop = CVMCPU_NOP3_INSTRUCTION; }#else CVMJITcsContext(con)->nop = CVMCPU_NOP2_INSTRUCTION;#endif CVMJITcsOutGoingRegisters(con, CVMCPU_JSP_REG) = CVM_TRUE; CVMJITcsOutGoingRegisters(con, CVMCPU_JFP_REG) = CVM_TRUE; CVMJITcsOutGoingRegisters(con, CVMCPU_SP_REG) = CVM_TRUE; { int arrayWords = CVMJITCS_TEMP_LOCAL_NUM * con->numberLocalWords; int arraySize = arrayWords * sizeof(CVMUint32); CVMJITcsUseJavaFrameBasedReferencePCArray(con) = CVMJITmemNew(con, JIT_ALLOC_CODE_SCHEDULING, arraySize); CVMJITcsDefJavaFrameBasedReferencePCArray(con) = CVMJITmemNew(con, JIT_ALLOC_CODE_SCHEDULING, arraySize); for (i = 0; i < arrayWords; i++) { CVMJITcsDefJavaFrameBasedReferencePC(con, i) = 0; CVMJITcsUseJavaFrameBasedReferencePC(con, i) = 0; } } CVMJITCSInitConstantPoolEntry(con); CVMJITcsBeginBlock(con);}voidCVMJITcsBeginBlock(CVMJITCompilationContext* con){ int i; CVMassert(!CVMglobals.jit.codeScheduling || (CVMJITcsContext(con)->emitInPlaceCount == 0)); CVMJITcsClearInstructionFlags(con); CVMJITcsSetEmitInsertInstruction(con); CVMJITcsSourceRegsNum(con) = 0; CVMJITcsDestRegister(con) = CVMCPU_INVALID_REG; CVMJITcsDestRegister2(con) = CVMCPU_INVALID_REG; CVMJITcsStorePC(con) = CVMJITcbufGetLogicalPC(con); CVMJITcsStatusPC(con) = CVMJITcbufGetLogicalPC(con); CVMJITcsBranchPC(con) = CVMJITcbufGetLogicalPC(con); CVMJITcbufGetLogicalInstructionPC(con) = CVMJITcbufGetLogicalPC(con); CVMJITcbufGetPhysicalPC(con) = CVMJITcbufLogicalToPhysical(con, CVMJITcbufGetLogicalPC(con)); CVMJITcsPutStaticFieldPC(con) = CVMJITcbufGetLogicalPC(con); CVMJITcsGetStaticFieldPC(con) = CVMJITcbufGetLogicalPC(con); for (i = 0; i < CVM_CPU_NUM_REGISTERS; i++) { CVMJITcsDefRegisterPC(con, i) = CVMJITcbufGetLogicalPC(con); CVMJITcsUseRegisterPC(con, i) = CVMJITcbufGetLogicalPC(con); CVMJITcsOutGoingRegisters(con, i) = CVM_FALSE; } CVMJITcsOutGoingRegisters(con, CVMCPU_JSP_REG) = CVM_TRUE; CVMJITcsOutGoingRegisters(con, CVMCPU_JFP_REG) = CVM_TRUE; CVMJITcsOutGoingRegisters(con, CVMCPU_SP_REG) = CVM_TRUE; CVMJITcsContext(con)->curBlockLogicalPC = CVMJITcbufGetLogicalPC(con); if (!CVMglobals.jit.codeScheduling) { CVMJITcsSetEmitInPlace(con); }}/* * Update the score board */voidCVMJITcsPrepareForNextInstruction(CVMJITCompilationContext* con){ CVMInt32 i; CVMUint32 instructionLogicalPC = CVMJITcbufGetLogicalInstructionPC(con); CVMInt32 registerPC = CVMJITcsIsLoadInstruction(con) ? instructionLogicalPC + CVM_XSCALE_LDR_LATENCY * sizeof(CVMCPUInstruction) : instructionLogicalPC + sizeof(CVMCPUInstruction); /* * Once the instruction is to raise exception, the branch propeties should be removed *//* IAI - 12 */#ifdef IAI_CS_EXCEPTION_ENHANCEMENT if (CVMJITcsIsExceptionInstruction(con)) { (CVMJITcsContext(con)->instructionFlags &= ~CVMJITCS_BRANCH_INSTRUCTION); }#endif /* IAI -12 */ /* * The earliest place of the next instruction which has the dependency
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -