📄 jitriscemitter_cpu.h
字号:
(destreg), (basereg), (memSpecToken), CVMCPU_COND_AL)/* ===== 32 Bit ALU Emitter APIs ========================================== */#define CVMCPUemitUnaryALU(con, opcode, destRegID, srcRegID, setcc) \ CVMCPUemitUnaryALUConditional((con), (opcode), (destRegID), \ (srcRegID), (setcc), CVMCPU_COND_AL)#define CVMCPUemitBinaryALU(con, opcode, destRegID, lhsRegID, \ rhstoken, setcc) \ CVMCPUemitBinaryALUConditional((con), (opcode), (destRegID), \ (lhsRegID), (rhstoken), (setcc), CVMCPU_COND_AL)#define CVMCPUemitBinaryALUConstant(con, opcode, destRegID, lhsRegID, \ rhsConstValue, setcc) \ CVMCPUemitBinaryALUConstantConditional((con), (opcode), (destRegID), \ (lhsRegID), (rhsConstValue), (setcc), CVMCPU_COND_AL)#define CVMCPUemitBinaryALURegister(con, opcode, destRegID, lhsRegID, \ rhsRegID, setcc) \ CVMCPUemitBinaryALU((con), (opcode), (destRegID), (lhsRegID), \ CVMARMalurhsEncodeRegisterToken(con, rhsRegID), (setcc))#define CVMCPUemitBinaryALURegisterConditional(con, \ opcode, destRegID, lhsRegID, rhsRegID, setcc, condCode) \ CVMCPUemitBinaryALUConditional((con), (opcode), (destRegID), (lhsRegID),\ CVMARMalurhsEncodeRegisterToken(con, rhsRegID), (setcc), (condCode))#define CVMCPUemitMoveRegister(con, opcode, destRegID, srcRegID, setcc) \ CVMCPUemitMove((con), (opcode), (destRegID), \ CVMARMalurhsEncodeRegisterToken(con, srcRegID), (setcc))#define CVMCPUemitMoveRegisterConditional(con, \ opcode, destRegID, srcRegID, setcc, condCode) \ CVMCPUemitMoveConditional((con), (opcode), (destRegID), \ CVMARMalurhsEncodeRegisterToken(con, srcRegID), (setcc), (condCode))#define CVMCPUemitCompareRegister(con, opcode, condCode, lhsRegID, rhsRegID) \ CVMCPUemitCompare((con), (opcode), (condCode), (lhsRegID), \ CVMARMalurhsEncodeRegisterToken(con, rhsRegID))#define CVMCPUemitMove(con, opcode, destRegID, srcToken, setcc) \ CVMCPUemitMoveConditional((con), (opcode), (destRegID), \ (srcToken), (setcc), CVMCPU_COND_AL)/* ===== Branch Emitter APIs ========================================== */extern voidCVMARMemitAbsoluteCallConditional(CVMJITCompilationContext* con, const void* target, CVMBool okToDumpCp, CVMBool okToBranchAroundCpDump, CVMCPUCondCode condCode, CVMBool flushReturnPCToFrame);#define CVMCPUemitAbsoluteCall(con, target, okToDumpCp, \ okToBranchAroundCpDump) \ CVMARMemitAbsoluteCallConditional((con), (target), (okToDumpCp), \ (okToBranchAroundCpDump), \ CVMCPU_COND_AL, CVM_FALSE)#define CVMCPUemitAbsoluteCallConditional(con, target, okToDumpCp, \ okToBranchAroundCpDump, condCode) \ CVMARMemitAbsoluteCallConditional((con), (target), (okToDumpCp), \ (okToBranchAroundCpDump), \ (condCode), CVM_FALSE)extern voidCVMARMemitBranch(CVMJITCompilationContext* con, int logicalPC, CVMCPUCondCode condCode, CVMBool link, CVMJITFixupElement** fixupList);#define CVMCPUemitBranchNeedFixup(con, target, condCode, fixupList) \ CVMARMemitBranch((con), (target), (condCode), \ CVM_FALSE, (fixupList))#define CVMCPUemitBranchLinkNeedFixup(con, target, fixupList) \ CVMARMemitBranch((con), (target), CVMCPU_COND_AL, \ CVM_TRUE, (fixupList))#define CVMCPUemitBranch(con, target, condCode) \ CVMCPUemitBranchNeedFixup((con), (target), (condCode), NULL)#define CVMCPUemitBranchLink(con, target) \ CVMCPUemitBranchLinkNeedFixup((con), (target), NULL)/* ===== Misc Emitter APIs ================================================ *//* Purpose: Loads the CCEE into the specified register. */#define CVMCPUemitLoadCCEE(con, destRegID) \ CVMCPUemitMoveRegister(con, CVMCPU_MOV_OPCODE, destRegID, CVMARM_sp, \ CVMJIT_NOSETCC)/* Purpose: Load or Store a field of the CCEE. On ARM the CCEE * is the same as sp. */#define CVMCPUemitCCEEReferenceImmediate(con, opcode, regID, offset) \ CVMCPUemitMemoryReferenceImmediate(con, opcode, \ regID, CVMARM_sp, offset)/************************************************************** * Misc function prototypes and macros. **************************************************************//* Purpose: Checks to see if a large constant can be encoded using mode1 rotate right immediates. */CVMBoolCVMARMmode1EncodeImmediate(CVMUint32 value, CVMUint32 *baseValue, CVMUint32 *rotateValue);/* * Make a PC-relative branch or branch-and-link instruction */CVMCPUInstructionCVMARMgetBranchInstruction(CVMCPUCondCode condCode, int offset, CVMBool link);/************************************************************** * Memory barrier emitters **************************************************************/#ifdef CVM_MP_SAFE#define CVMCPUemitMemBarAcquire(con) \ CVMCPUemitMemBar(con)#define CVMCPUemitMemBarRelease(con) \ CVMCPUemitMemBar(con)#endif/************************************************************** * CPU C Call convention abstraction - The following are prototypes of calling * convention support functions required by the RISC emitter porting layer. **************************************************************//* Purpose: Gets the registers required by a C call. These register could be altered by the call being made. */extern CVMJITRegsRequiredTypeCVMARMCCALLgetRequired(CVMJITCompilationContext *con, CVMJITRegsRequiredType argsRequired, CVMJITIRNode *intrinsicNode, CVMJITIntrinsic *irec, CVMBool useRegArgs);/* Purpose: Dynamically instantiates an instance of the CVMCPUCallContext. */#define CVMCPUCCallnewContext(con) \ ((CVMCPUCallContext *)CVMJITmemNew(con, JIT_ALLOC_CGEN_OTHER, \ sizeof(CVMCPUCallContext)))/* Purpose: Gets the registers required by a C call. These register could be altered by the call being made. */#define CVMCPUCCALLgetRequired(con, argsRequired, node, irec, useRegArgs) \ useRegArgs? /* IAI-22 */ \ CVMARMCCALLgetRequired(con, argsRequired, node, irec, useRegArgs): \ (CVMCPU_AVOID_C_CALL | argsRequired)#define CVMARMCCALLargSize(argType) \ (((argType == CVM_TYPEID_LONG) || (argType == CVM_TYPEID_DOUBLE)) ? 2 : 1)/* Purpose: Performs initialization in preparation for pinning arguments to registers or to overflow to the native stack. */#define CVMCPUCCALLinitArgs(con, callContext, irec, forTargetting, \ useRegArgs) { \ int numberOfArgsWords = (irec)->numberOfArgsWords; \ (callContext)->reservedRes = NULL; \ /* NOTE: We assume that if the intrinsic is using RegArgs, then \ we are guaranteed that there are enough registers to use as \ args. This is because CVMJITINTRINSIC_REG_ARGS will only be \ declared for target specific intrinsics. Common code cannot \ use this calling convention because it has no knowledge of the \ convention implementation details, and hence can't use it. */ \ if (!(forTargetting) && !(useRegArgs) && \ (numberOfArgsWords > CVMCPU_MAX_ARG_REGS)) { \ int stackWords = numberOfArgsWords - CVMCPU_MAX_ARG_REGS; \ stackWords = (stackWords + 1) & ~1; /* align for AAPCS */ \ stackWords *= 4; \ CVMCPUemitBinaryALUConstant((con), CVMCPU_SUB_OPCODE, \ CVMCPU_SP_REG, CVMCPU_SP_REG, stackWords, CVMJIT_NOSETCC); \ } \}/* Purpose: Gets the register targets for the specified argument. */#define CVMCPUCCALLgetArgTarget(con, callContext, argType, argNo, \ argWordIndex, useRegArgs) \ ((argWordIndex + CVMARMCCALLargSize(argType) <= CVMCPU_MAX_ARG_REGS) ? \ (1U << (CVMCPU_ARG1_REG + argWordIndex)) : \ useRegArgs ? /* IAI-22 */ \ (1U << (CVMARM_v3 + argWordIndex - CVMCPU_MAX_ARG_REGS)) : \ CVMRM_ANY_SET)/* Purpose: Relinquish a previously pinned arguments. */#define CVMCPUCCALLrelinquishArg(con, callContext, arg, argType, argNo, \ argWordIndex, useRegArgs) \ if ((useRegArgs) /* IAI-22 */ || \ argWordIndex + CVMARMCCALLargSize(argType) <= CVMCPU_MAX_ARG_REGS) { \ CVMRMrelinquishResource(CVMRM_INT_REGS(con), arg); \ } else if ((callContext)->reservedRes != NULL) { \ CVMRMrelinquishResource(CVMRM_INT_REGS(con), \ (callContext)->reservedRes); \ (callContext)->reservedRes = NULL; \ }/* Purpose: Releases any resources allocated in CVMCPUCCALLinitArgs(). */#define CVMCPUCCALLdestroyArgs(con, callContext, irec, forTargetting, \ useRegArgs) { \ int numberOfArgsWords = (irec)->numberOfArgsWords; \ ((void)callContext); \ if (!(forTargetting) && !(useRegArgs) && \ (numberOfArgsWords > CVMCPU_MAX_ARG_REGS)) { \ int stackWords = numberOfArgsWords - CVMCPU_MAX_ARG_REGS; \ stackWords = (stackWords + 1) & ~1; /* align for AAPCS */ \ stackWords *= 4; \ CVMCPUemitBinaryALUConstant((con), CVMCPU_ADD_OPCODE, \ CVMCPU_SP_REG, CVMCPU_SP_REG, stackWords, CVMJIT_NOSETCC); \ } \}#ifdef CVM_JIT_USE_FP_HARDWARE/* Purpose: Emits instructions to move register contents * to and from fp registers */voidCVMARMemitMoveFloatFP(CVMJITCompilationContext* con, int opcode, int destRegID, int srcRegID);voidCVMARMemitMoveDoubleFP(CVMJITCompilationContext* con, int opcode, int fpRegID, int regID);/* Purpose: Emits instructions to move system register contents * to and from ARM registers */voidCVMARMemitStatusRegisterFP(CVMJITCompilationContext* con, int opcode, int statusReg, int regID);#endif /* CVM_JIT_USE_FP_HARDWARE */#endif /* _INCLUDED_ARM_JITRISCEMITTER_CPU_H */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -