jitgrammarrules.jcs
来自「This is a resource based on j2me embedde」· JCS 代码 · 共 1,919 行 · 第 1/5 页
JCS
1,919 行
item->logicalAddress = logicalAddress; ++(*tos);}static CVMLookupSwitchStackItem*popLookupNode(CVMLookupSwitchStackItem stack[], CVMUint8* tos){ CVMLookupSwitchStackItem* item; if (*tos == 0) { return 0; } --(*tos); item = &stack[*tos]; CVMtraceJITCodegen(("<--- Popping #%d (low=%d index=%d high=%d prev=%d)\n", *tos, item->low, (item->low + item->high) / 2, item->high, item->prevIndex)); return item;}/* Purpose: Emits a call to a Unary CCM helper. */static voidunaryHelper( CVMJITCompilationContext *con, void *helperAddress, CVMJITIRNodePtr thisNode, CVMRMregset outgoingSpillRegSet, int resultSize){ CVMRMResource *src = popResource(con); CVMRMResource *dest; /* Pin the input to CVMCPU_ARG1_REG because the helper expects it there: */ src = CVMRMpinResourceSpecific(CVMRM_INT_REGS(con), src, CVMCPU_ARG1_REG); /* Spill the outgoing registers if necessary: */ CVMRMminorSpill(con, outgoingSpillRegSet);#ifdef CVMCPU_HAS_64BIT_REGISTERS { int argSize = CVMRMgetSize(src); if (argSize == 2) { /* argSize = 2 means the argument is doubleword */ CVMCPUemitMoveTo64BitRegister(con, CVMCPU_ARG1_REG, CVMCPU_ARG1_REG); } }#endif /* Emit the call to the helper to compute the result: */ CVMCPUemitAbsoluteCall(con, helperAddress, CVMJIT_CPDUMPOK, CVMJIT_CPBRANCHOK, src->nregs);#ifdef CVMCPU_HAS_64BIT_REGISTERS { if (resultSize == 2) { /* resultSize = 2 means the result is doubleword. */ CVMCPUemitMoveFrom64BitRegister(con, CVMCPU_RESULT1_REG, CVMCPU_RESULT1_REG); } }#endif /* Release resources and publish the result: */ CVMRMrelinquishResource(CVMRM_INT_REGS(con), src); dest = CVMRMgetResourceSpecific(CVMRM_INT_REGS(con), CVMCPU_RESULT1_REG, resultSize); CVMRMoccupyAndUnpinResource(CVMRM_INT_REGS(con), dest, thisNode); pushResource(con, dest);}/* Purpose: Emits a call to a Binary CCM helper which return a word result. */static voidwordBinaryHelper( CVMJITCompilationContext *con, void* helperAddress, CVMJITIRNodePtr thisNode, CVMBool checkZero ){ binaryHelper(con, helperAddress, thisNode, checkZero, 2, 1);}/* Purpose: Emits a call to a Binary CCM helper which return a dword result. */static voidlongBinaryHelper( CVMJITCompilationContext *con, void *helperAddress, CVMJITIRNodePtr thisNode, CVMBool checkZero ){ binaryHelper(con, helperAddress, thisNode, checkZero, 4, 2);}/* Purpose: Emits a call to a Binary CCM helper which return a dword result, * but whose 2nd argument is 32-bit, not 64-bit. */static voidlongBinaryHelper2( CVMJITCompilationContext *con, void *helperAddress, CVMJITIRNodePtr thisNode, CVMBool checkZero ){ binaryHelper(con, helperAddress, thisNode, checkZero, 3, 2);}/* Purpose: Emits a call to a Binary CCM helper which return a word result. */static voidlongBinary2WordHelper( CVMJITCompilationContext *con, void *helperAddress, CVMJITIRNodePtr thisNode, CVMBool checkZero){ binaryHelper(con, helperAddress, thisNode, checkZero, 4, 1);}static voidbranchToBlock( CVMJITCompilationContext* con, CVMCPUCondCode condcode, CVMJITIRBlock* target);#ifdef CVM_NEED_DO_FCMP_HELPER/* Purpose: Emits code to compare 2 floats by calling a helper function. */static voidfcomparecc(CVMJITCompilationContext *con, CVMJITIRNodePtr thisNode, CVMBool needBranch, CVMBool needSetcc){ CVMRMResource *rhs = popResource(con); CVMRMResource *lhs = popResource(con); CVMUint32 nanResult; int flags; /* If needBranch is TRUE, then we know this is CVMJITConditionalBranch. * Otherwise is is a CVMJITBinaryOp. */ if (needBranch) { flags = CVMJITirnodeGetCondBranchOp(thisNode)->flags; } else { flags = CVMJITirnodeGetBinaryNodeFlag(thisNode); } if (flags & CVMJITCMPOP_UNORDERED_LT) { nanResult = -1; } else { nanResult = 1; } /* Pin the input to the first two arguments because the helper expects it there: */ lhs = CVMRMpinResourceSpecific(CVMRM_INT_REGS(con), lhs, CVMCPU_ARG1_REG); rhs = CVMRMpinResourceSpecific(CVMRM_INT_REGS(con), rhs, CVMCPU_ARG2_REG); /* Spill the outgoing registers if necessary: */ CVMRMminorSpill(con, ARG1|ARG2); CVMJITaddCodegenComment((con, "do fcmp")); CVMJITstatsRecordInc(con, CVMJIT_STATS_CVMCCMruntimeFCmp); CVMCPUemitLoadConstant(con, CVMCPU_ARG3_REG, nanResult); /* Emit the call to the helper to compute the result: */ CVMJITaddCodegenComment((con, "call CVMCCMruntimeFCmp")); CVMJITsetSymbolName((con, "CVMCCMruntimeFCmp")); CVMCPUemitAbsoluteCall(con, (void*)CVMCCMruntimeFCmp, CVMJIT_CPDUMPOK, CVMJIT_CPBRANCHOK, 3); /* if the needBranch is true, then we need to convert the {-1,0,1} * into a boolean condition code and do a conditional branch */ if (needBranch) { CVMJITConditionalBranch* branch = CVMJITirnodeGetCondBranchOp(thisNode); CVMCPUCondCode cc = mapCondCode(branch->condition); if (needSetcc) { CVMJITaddCodegenComment((con, "set condition code")); CVMCPUemitCompare(con, CVMCPU_CMP_OPCODE, cc, CVMCPU_RESULT1_REG, CVMCPUALURhsTokenConstZero); } CVMRMsynchronizeJavaLocals(con); CVMRMpinAllIncomingLocals(con, branch->target, CVM_FALSE); branchToBlock(con, cc, branch->target); CVMRMunpinAllIncomingLocals(con, branch->target); } /* Release resources and publish the result: */ CVMRMrelinquishResource(CVMRM_INT_REGS(con), lhs); CVMRMrelinquishResource(CVMRM_INT_REGS(con), rhs);}#endif /* CVM_NEED_DO_FCMP_HELPER */#ifdef CVM_NEED_DO_DCMP_HELPER/* Purpose: Emits code to compare 2 doubles by calling a helper. */static voiddcomparecc(CVMJITCompilationContext *con, CVMJITIRNodePtr thisNode, CVMBool needBranch, CVMBool needSetcc){ CVMRMResource *rhs = popResource(con); CVMRMResource *lhs = popResource(con); CVMUint32 nanResult; int flags; /* If needBranch is TRUE, then we know this is CVMJITConditionalBranch. Otherwise is is a CVMJITBinaryOp. */ if (needBranch) { flags = CVMJITirnodeGetCondBranchOp(thisNode)->flags; } else { flags = CVMJITirnodeGetBinaryNodeFlag(thisNode); } if (flags & CVMJITCMPOP_UNORDERED_LT) { nanResult = -1; } else { nanResult = 1; } /* Pin the input to the first two arguments because the helper expects it there: */ lhs = CVMRMpinResourceSpecific(CVMRM_INT_REGS(con), lhs, CVMCPU_ARG1_REG); rhs = CVMRMpinResourceSpecific(CVMRM_INT_REGS(con), rhs, CVMCPU_ARG3_REG); /* Spill the outgoing registers if necessary: */ CVMRMminorSpill(con, ARG1|ARG2|ARG3|ARG4);#ifdef CVMCPU_HAS_64BIT_REGISTERS { /* Both arguments are doubleword */ CVMCPUemitMoveTo64BitRegister(con, CVMCPU_ARG1_REG, CVMCPU_ARG1_REG); CVMCPUemitMoveTo64BitRegister(con, CVMCPU_ARG2_REG, CVMCPU_ARG3_REG); }#endif /* Emit the call to the helper to compute the result: */ if (nanResult == -1) { CVMJITstatsRecordInc(con, CVMJIT_STATS_CVMCCMruntimeDCmpl); CVMJITaddCodegenComment((con, "call CVMCCMruntimeDCmpl")); CVMJITsetSymbolName((con, "CVMCCMruntimeDCmpl")); CVMCPUemitAbsoluteCall(con, (void*)CVMCCMruntimeDCmpl, CVMJIT_CPDUMPOK, CVMJIT_CPBRANCHOK, 4); } else { CVMJITstatsRecordInc(con, CVMJIT_STATS_CVMCCMruntimeDCmpg); CVMJITaddCodegenComment((con, "call CVMCCMruntimeDCmpg")); CVMJITsetSymbolName((con, "CVMCCMruntimeDCmpg")); CVMCPUemitAbsoluteCall(con, (void*)CVMCCMruntimeDCmpg, CVMJIT_CPDUMPOK, CVMJIT_CPBRANCHOK, 4); } /* if the needBranch is true, then we need to convert the {-1,0,1} * into a boolean condition code and do a conditional branch */ if (needBranch) { CVMJITConditionalBranch* branch = CVMJITirnodeGetCondBranchOp(thisNode); CVMCPUCondCode cc = mapCondCode(branch->condition); if (needSetcc) { CVMJITaddCodegenComment((con, "set condition code")); CVMCPUemitCompare(con, CVMCPU_CMP_OPCODE, cc, CVMCPU_RESULT1_REG, CVMCPUALURhsTokenConstZero); } CVMRMsynchronizeJavaLocals(con); CVMRMpinAllIncomingLocals(con, branch->target, CVM_FALSE); branchToBlock(con, cc, branch->target); CVMRMunpinAllIncomingLocals(con, branch->target); } /* Release resources and publish the result: */ CVMRMrelinquishResource(CVMRM_INT_REGS(con), lhs); CVMRMrelinquishResource(CVMRM_INT_REGS(con), rhs);}#endif /* CVM_NEED_DO_DCMP_HELPER */%}// Purpose: STATIC32(staticFieldSpec) = value32.root: ASSIGN STATIC32 memSpec reg32 : 20 : : : : { CVMJITprintCodegenComment(("Do putstatic:")); CVMJITaddCodegenComment((con, "putstatic(staticFieldAddr, value{I|F})")); setStaticField(con, CVMRM_INT_REGS(con), CVMCPU_STR32_OPCODE); };// Purpose: STATIC64(staticFieldSpec) = value64.root: ASSIGN STATIC64 memSpec reg64 : 20 : : : : { CVMJITprintCodegenComment(("Do putstatic:")); CVMJITaddCodegenComment((con, "putstatic(staticFieldAddr, value{L|D})")); setStaticField(con, CVMRM_INT_REGS(con), CVMCPU_STR64_OPCODE);};// Purpose: STATIC64VOL(staticFieldSpec) = value64.root: ASSIGN STATIC64VOL regAddr reg64 : 90 : SET_AVOID_C_CALL($$); : SET_TARGET2($$, ARG3, ARG1) : : { CVMRMResource* rhs = popResource(con); CVMRMResource* lhs = popResource(con); /* Swap the arguments because the runtime helper function will expect the 64-bit source value to come first followed by the static field address: */ pushResource(con, rhs); pushResource(con, lhs); CVMJITprintCodegenComment(("Do volatile putstatic:")); CVMJITaddCodegenComment((con, "call CVMCCMruntimePutstatic64Volatile")); CVMJITsetSymbolName((con, "CVMCCMruntimePutstatic64Volatile")); CVMJITstatsRecordInc(con, CVMJIT_STATS_CVMCCMruntimePutstatic64Volatile); /* Call the helper function: */ longBinaryHelper2(con, (void*)CVMCCMruntimePutstatic64Volatile, $$, CVM_FALSE); };aluRhs: ICONST_32 : 0 : : : : pushALURhsConstant(con, CVMJITirnodeGetConstant32($$)->j.i);// Purpose: Converts a value32 into an aluRhs.aluRhs: reg32 : 0 : : : : { CVMRMResource* operand = popResource(con); pushALURhsResource(con, operand);};memSpec: ICONST_32 : 0 : : : : { pushMemSpecImmediate(con, CVMJITirnodeGetConstant32($$)->j.i);};// Purpose: value32 = value32 << (const32 & 0x1f).reg32: SLL32 reg32 ICONST_32 : 20 : : : : { doIntShift(con, CVMCPU_SLL_OPCODE, $$, GET_REGISTER_GOALS);};// Purpose: value32 = value32 << (value32 & 0x1f).reg32: SLL32 reg32 reg32 : 20 : : : : { doRegShift(con, CVMCPU_SLL_OPCODE, $$, GET_REGISTER_GOALS);};// Purpose: value32 = value32 >>> (const32 & 0x1f). unsigned shift right.reg32: SRL32 reg32 ICONST_32 : 20 : : : : { doIntShift(con, CVMCPU_SRL_OPCODE, $$, GET_REGISTER_GOALS);};// Purpose: value32 = value32 >>> (value32 & 0x1f). unsigned shift right.reg32: SRL32 reg32 reg32 : 20 : : : : { doRegShift(con, CVMCPU_SRL_OPCODE, $$, GET_REGISTER_GOALS);};// Purpose: value32 = value32 >> (const32 & 0x1f). signed shift right.reg32: SRA32 reg32 ICONST_32 : 20 : : : : { doIntShift(con, CVMCPU_SRA_OPCODE, $$, GET_REGISTER_GOALS);};// Purpose: value32 = value32 >> (value32 & 0x1f). signed shift right.reg32: SRA32 reg32 reg32 : 20 : : : : { doRegShift(con, CVMCPU_SRA_OPCODE, $$, GET_REGISTER_GOALS);};//// "R" Sequences://// SEQUENCE_R// / \// effect expr//// evaluates to the value of 'expr'. 'effect' does not produce a value.//%{#define SEQUENCE_R_INHERITANCE(thisNode, rc) { \ SET_ATTRIBUTE_TYPE(0, CVMJIT_EXPRESSION_ATTRIBUTE_TARGET_AVOID); \ goal_top[0].attributes[0].u.rs.target = CVMRM_GET_ANY_SET(rc); \ goal_top[0].attributes[0].u.rs.avoid = CVMRM_EMPTY_SET; \ goal_top[0].attributes[1] = goal_top[-1].curr_attribute[0]; \}%}reg32: ISEQUENCE_R effect reg32 : 0 : : SEQUENCE_R_INHERITANCE($$, CVMRM_INT_REGS(con)); : : { passLastEvaluated(con, CVMRM_INT_REGS(con), $$);};reg64: LSEQUENCE_R effect reg64 : 0 : : SEQUENCE_R_INHERITANCE($$, CVMRM_INT_REGS(con)); : : { passLastEvaluated(con, CVMRM_INT_REGS(con), $$);};// "type-less" sequence. reg32: VSEQUENCE_R effect reg32 : 1 : :
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