jitarchemitter.h

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/*
 * @(#)jitarchemitter.h	1.6 06/10/23
 *
 * Portions Copyright  2000-2008 Sun Microsystems, Inc. All Rights
 * Reserved.  Use is subject to license terms.
 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER
 * 
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version
 * 2 only, as published by the Free Software Foundation.
 * 
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
 * General Public License version 2 for more details (a copy is
 * included at /legal/license.txt).
 * 
 * You should have received a copy of the GNU General Public License
 * version 2 along with this work; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 * 
 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
 * Clara, CA 95054 or visit www.sun.com if you need additional
 * information or have any questions.
 */

#ifndef _INCLUDED_JITARCHEMITTER_H
#define _INCLUDED_JITARCHEMITTER_H

#include "javavm/include/objects.h"
#include "javavm/include/classes.h"

#include "javavm/include/porting/jit/jit.h"
#include "javavm/include/jit/jitregman.h"
#include "javavm/include/jit/jitciscemitterdefs_cpu.h"

/*
 * This file defines the CISC emitter porting layer which includes opaque
 * data structures and function APIs which the platform needs to provide
 * in 2 files: jitciscemitterdefs_cpu.h and jitciscemitter_cpu.h.
 * jitciscemitterdefs_cpu.h will be included at the top of this file and
 * jitciscemitter_cpu.h will be included at the bottom.
 *
 * jitciscemitterdefs_cpu.h is responsible for defining the opaque data
 * structures and option #defines required by this file, as well as
 * defining data structures and #define values for use in the platform
 * specific grammar file.
 *
 * jitciscemitter_cpu.h is responsible for overriding emitter functions
 * with macros as needed as well as declaring platform specific emitter
 * functions and macros for use in the platform specific grammar file.
 */

/**************************************************************
 * CPU condition codes - The following are definition of the condition
 * codes that are required by the CISC emitter porting layer.
 **************************************************************

    CVMCPUCondCode - opaque type encapsulating condition codes.  The enum
                     list below outlines the complete set of condition codes
                     that may need to be supported.  The common CISC code only
                     makes use of a subset of these condition codes.  However,
                     the complete set is listed here for completeness.

    typedef enum CVMCPUCondCode {
        CVMCPU_COND_EQ,     // Do when equal
        CVMCPU_COND_NE,     // Do when NOT equal
        CVMCPU_COND_MI,     // Do when has minus / negative
        CVMCPU_COND_PL,     // Do when has plus / positive or zero
        CVMCPU_COND_OV,     // Do when overflowed
        CVMCPU_COND_NO,     // Do when NOT overflowed
        CVMCPU_COND_LT,     // Do when signed less than
        CVMCPU_COND_GT,     // Do when signed greater than
        CVMCPU_COND_LE,     // Do when signed less than or equal
        CVMCPU_COND_GE,     // Do when signed greater than or equal
        CVMCPU_COND_LO,     // Do when lower / unsigned less than
        CVMCPU_COND_HI,     // Do when higher / unsigned greater than
        CVMCPU_COND_LS,     // Do when lower or same / is unsigned <=
        CVMCPU_COND_HS,     // Do when higher or same / is unsigned >=
        CVMCPU_COND_AL,     // Do always
        CVMCPU_COND_NV,     // Do never

#ifdef CVM_JIT_USE_FP_HARDWARE
        CVMCPU_COND_FEQ,    // Do when float equal
	CVMCPU_COND_FNE,    // Do when float NOT equal
	CVMCPU_COND_FLT,    // Do when float less than
	CVMCPU_COND_FGT,    // Do when float unordered or greater than
	CVMCPU_COND_FLE,    // Do when float less than or equal
	CVMCPU_COND_FGE    // Do when float unordered or greater than or equal

    // by default, unordered compares are treated at greater than. If the
    // UNORDERED_LT bit is set on the condition code, then unordered
    // is treated as less than.
    #define CVMCPU_COND_UNORDERED_LT	<bitmask>
#endif

    } CVMCPUCondCode;

    #ifdef CVM_JIT_USE_FP_HARDWARE
    #endif

    CVMCPUCondCode and its various values should be defined in
    jitciscemitterdefs_cpu.h.
*/

/**************************************************************
 * CPU Opcodes - The following are definition of opcode encodings
 * that are required by the CISC emitter porting layer.  Where
 * actual opcodes do not exists, pseudo opcodes are substituted.
 **************************************************************

    The platform need to provide definitions of the following opcode values.
    The operation that the opcode represents is also documented below.

    CVMCPU_NOP_INSTRUCTION     // do a no-op

    // Memory Reference opcodes:
    CVMCPU_LDR64_OPCODE     // Load signed 64 bit value.
    CVMCPU_STR64_OPCODE     // Store 64 bit value.
    CVMCPU_LDR32_OPCODE     // Load signed 32 bit value.
    CVMCPU_STR32_OPCODE     // Store 32 bit value.
    CVMCPU_LDR16U_OPCODE    // Load unsigned 16 bit value.
    CVMCPU_LDR16_OPCODE     // Load signed 16 bit value.
    CVMCPU_STR16_OPCODE     // Store 16 bit value.
    CVMCPU_LDR8U_OPCODE     // Load unsigned 8 bit value.
    CVMCPU_LDR8_OPCODE      // Load signed 8 bit value.
    CVMCPU_STR8_OPCODE      // Store 8 bit value.

    // 32 bit ALU opcodes:
    CVMCPU_MOV_OPCODE       // reg32 = aluRhs32.
    CVMCPU_NEG_OPCODE       // reg32 = -reg32.
    CVMCPU_NOT_OPCODE       // reg32 = (reg32 == 0) ? 1 : 0.
    CVMCPU_INT2BIT_OPCODE   // reg32 = (reg32 != 0) ? 1 : 0.
    CVMCPU_ADD_OPCODE       // reg32 = reg32 + aluRhs32.
    CVMCPU_SUB_OPCODE       // reg32 = reg32 - aluRhs32.
    CVMCPU_AND_OPCODE       // reg32 = reg32 AND aluRhs32.
    CVMCPU_ORR_OPCODE       // reg32 = reg32 OR aluRhs32.
    CVMCPU_XOR_OPCODE       // reg32 = reg32 XOR aluRhs32.
    CVMCPU_BIC_OPCODE       // reg32 = reg32 AND ~aluRhs32.
    CVMCPU_SLL_OPCODE       // Do logical left shift on a reg32.
    CVMCPU_SRL_OPCODE       // Do logical right shift on a reg32.
    CVMCPU_SRA_OPCODE       // Do arithmetic right shift on a reg32.

    CVMCPU_MULL_OPCODE      // reg32 = LO32(reg32 * reg32).
    CVMCPU_MULH_OPCODE      // reg32 = HI32(reg32 * reg32).
    CVMCPU_CMP_OPCODE       // cmp reg32, aluRhs32 => set cc.
    CVMCPU_CMN_OPCODE       // cmp reg32, -aluRhs32 => set cc.

    // 64 bit ALU opcodes:
    CVMCPU_NEG64_OPCODE     // reg64 = -reg64.
    CVMCPU_ADD64_OPCODE     // reg64 = reg64 + reg64.
    CVMCPU_SUB64_OPCODE     // reg64 = reg64 - reg64.
    CVMCPU_AND64_OPCODE     // reg64 = reg64 AND reg64.
    CVMCPU_OR64_OPCODE      // reg64 = reg64 OR reg64.
    CVMCPU_XOR64_OPCODE     // reg64 = reg64 XOR reg64.
    CVMCPU_SLL64_OPCODE     // Do logical left shift on a reg64.
    CVMCPU_SRL64_OPCODE     // Do logical right shift on a reg64.
    CVMCPU_SRA64_OPCODE     // Do arithmetic right shift on a reg64.

    CVMCPU_MUL64_OPCODE     // reg64 = reg64 * reg64.
    CVMCPU_DIV64_OPCODE     // reg64 = reg64 / reg64.
    CVMCPU_REM64_OPCODE     // reg64 = reg64 % reg64.
    CVMCPU_CMP64_OPCODE     // cmp reg64, reg64 => set cc.

    If floating-point hardware use used by setting CVM_JIT_USE_FP_HARDWARE
    then the following must also be defined:

    CVMCPU_FLDR64_OPCODE     // Load 64 bit value to float register.
    CVMCPU_FSTR64_OPCODE     // Store 64 bit value from float register.
    CVMCPU_FLDR32_OPCODE     // Load 32 bit value to float register.
    CVMCPU_FSTR32_OPCODE     // Store 32 bit value from float register.
    // in shared code, these will only be used to move values of
    // types 'double' and 'float' respectively.

    CVMCPU_FADD_OPCODE	     // single float freg32 = freg32 + freg32
    CVMCPU_FSUB_OPCODE	     // single float freg32 = freg32 - freg32
    CVMCPU_FMUL_OPCODE	     // single float freg32 = freg32 * freg32
    CVMCPU_FDIV_OPCODE	     // single float freg32 = freg32 / freg32
    CVMCPU_FNEG_OPCODE	     // single float freg32 = - freg32
    CVMCPU_FMOV_OPCODE	     // single float freg32 = freg32
    CVMCPU_FCMP_OPCODE	     // single float compare freg32, freg32 => set cc.

    CVMCPU_DADD_OPCODE	     // double float freg64 = freg64 + freg64
    CVMCPU_DSUB_OPCODE	     // double float freg64 = freg64 - freg64
    CVMCPU_DMUL_OPCODE	     // double float freg64 = freg64 * freg64
    CVMCPU_DDIV_OPCODE	     // double float freg64 = freg64 / freg64
    CVMCPU_DNEG_OPCODE	     // double float freg64 = - freg64
    CVMCPU_DCMP_OPCODE	     // double float compare freg64, freg64 => set cc.

    The opcode encodings should be defined in jitciscemitterdefs_cpu.h.
*/

/**************************************************************
 * CPU ALURhs and associated types - The following are definition
 * of the ALURhs abstraction required by the CISC emitter porting layer.
 **************************************************************

    The ALURhs is an abstraction of right hand side operands for ALU type
    instructions.  The platform need to provide definitions of the ALURhs
    abstraction in the form of the following types:

        CVMCPUALURhs        - The base class of all ALURhs for the CPU.
                              CVMCPUALURhs is a field in the code-gen time
                              semantic stack element.
        CVMCPUALURhsToken   - A token encoded from the content of an
                              ALUrhs.  This token is used as arguments for
                              ALU code emitters.

        CVMCPUALURhsTokenConstZero - An instance of CVMCPUALURhsToken
                                     representing the an ALURhs of a constant
                                     value 0.

    There are 2 standard types of ALURhs that is expected by the common cisc
    code:
        1. Constant
        2. Register

    It is assumed that immediate values of 0 to 255 (inclusive) are always
    encodable as ALURhs constants.

    The above should be defined in jitciscemitterdefs_cpu.h.

    The following are prototypes of ALURhs functions that need to be
    implemented by the platform.  The platform can choose to redirect these
    functions with macros.  If so, the re-direction macros should be defined
    in jitciscemitter_cpu.h.
*/

/* ALURhs constructors and query APIs: ==================================== */

/* Purpose: Constructs a constant type CVMCPUALURhs. */
extern CVMCPUALURhs*
CVMCPUalurhsNewConstant(CVMJITCompilationContext*, CVMInt32);

/* Purpose: Constructs a register type CVMCPUALURhs. */
extern CVMCPUALURhs*
CVMCPUalurhsNewRegister(CVMJITCompilationContext*, CVMRMResource* regID);

/* Purpose: Checks to see if the specified value is encodable as an immediate
            value that can be used as an ALURhs in an instruction. */
extern CVMBool
CVMCPUalurhsIsEncodableAsImmediate(int opcode, CVMInt32 constValue);

/* Purpose: Checks if the CVMCPUALURhs operand is of a const value type. */
extern CVMBool
CVMCPUalurhsIsConstant(CVMCPUALURhs *aluRhs);

/* Purpose: Gets the const value that of a const value type CVMCPUALURhs.
            This function only applies if the CVMCPUALURhs is of a const value
            type. */
extern CVMInt32
CVMCPUalurhsGetConstantValue(CVMCPUALURhs *aluRhs);

/* ALURhs token encoder APIs: ============================================= */

/* Purpose: Gets the token for the CVMCPUALURhs operand for use in the
            instruction emitters. */
extern CVMCPUALURhsToken
CVMCPUalurhsGetToken(CVMJITCompilationContext *, const CVMCPUALURhs *);

/* ALURhs resource management APIs: ======================================= */

/* Purpose: Pins the resources that this CVMCPUALURhs may use. */
extern void
CVMCPUalurhsPinResource(CVMJITRMContext*, int opcode, CVMCPUALURhs*,
                        CVMRMregset target, CVMRMregset avoid);

extern void
CVMCPUalurhsPinResourceAddr(CVMJITRMContext*, int opcode, CVMCPUALURhs*,
                        CVMRMregset target, CVMRMregset avoid);

/* Purpose: Relinquishes the resources that this CVMCPUALURhsToken may use. */
extern void
CVMCPUalurhsRelinquishResource(CVMJITRMContext*, CVMCPUALURhs*);


/**************************************************************
 * CPU MemSpec and associated types - The following are definitions
 * of the MemSpec abstraction required by the CISC emitter porting layer.
 **************************************************************

     The MemSpec is an abstraction of memory specification operands for memory
     reference instructions.  The memory specification defines modifications
     on the base register before a memory reference is made.  The platform
     need to provide definitions of the MemSpec abstraction in the form of the
     following types:

        CVMCPUMemSpec       - The base class of all MemSpec for the CPU.
                              CVMCPUMemSpec is a field in the code-gen time
                              semantic stack element.
        CVMCPUMemSpecToken  - A token encoded from the content of a MemSpec.
                              This token is used as arguments for memory
                              reference (i.e. load/store) code emitters.