📄 cstartup.lst
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ARM GAS C:\DOCUME~1\pstang\LOCALS~1\Temp/cc2Zaaaa.s page 1
1 # 1 "c:\\code\\arm\\armlib/arch/at91/boot/cstartup.s"
2 # 1 "C:\\Code\\ARM\\at91\\xmboot//"
1 /*------------------------------------------------------------------------------
0
0
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2 //*- ATMEL Microcontroller Software Support - ROUSSET -
3 //*------------------------------------------------------------------------------
4 //* The software is delivered "AS IS" without warranty or condition of any
5 //* kind, either express, implied or statutory. This includes without
6 //* limitation any warranty or condition with respect to merchantability or
7 //* fitness for any particular purpose, or against the infringements of
8 //* intellectual property rights of others.
9 //*-----------------------------------------------------------------------------
10 //*- File source : Cstartup.s
11 //*- Object : Generic CStartup for KEIL and GCC No Use REMAP
12 //*- Compilation flag : None
13 //*-
14 //*- 1.0 18/Oct/04 JPP : Creation
15 //*- 1.1 21/Feb/05 JPP : Set Interrupt
16 //*- 1.1 01/Apr/05 JPP : save SPSR
17 //*-----------------------------------------------------------------------------*/
18
19 .equ IRQ_Stack_Size, 0x00000060
20
21 /* #include "AT91SAM7S64_inc.h" */
22
23 .equ AIC_IVR, (256)
24 .equ AIC_FVR, (260)
25 .equ AIC_EOICR, (304)
26 .equ AT91C_BASE_AIC, (0xFFFFF000)
27
28 #;------------------------------------------------------------------------------
29 #;- Section Definition
30 #;-----------------
31 #;- Section
32 #;- .internal_ram_top Top_Stack: used by the cstartup for vector initalisation
33 #;- management defined by ld and affect from ldscript
34 #;------------------------------------------------------------------------------
35 .section .internal_ram_top
36 .code 32
37 .align 0
38 .global Top_Stack
39 Top_Stack:
40
41 /*------------------------------------------------------------------------------
42 *- Area Definition
43 *------------------------------------------------------------------------------
44 * .text is used instead of .section .text so it works with arm-aout too. */
45 .section .reset
46 .text
47 .global _startup
48 .func _startup
49 _startup:
50 reset:
51 /*------------------------------------------------------------------------------
52 //*- Exception vectors
ARM GAS C:\DOCUME~1\pstang\LOCALS~1\Temp/cc2Zaaaa.s page 2
53 //*--------------------
54 //*- These vectors can be read at address 0 or at RAM address
55 //*- They ABSOLUTELY requires to be in relative addresssing mode in order to
56 //*- guarantee a valid jump. For the moment, all are just looping.
57 //*- If an exception occurs before remap, this would result in an infinite loop.
58 //*- To ensure if a exeption occurs before start application to infinite loop.
59 //*------------------------------------------------------------------------------*/
60
61 0000 100000EA B InitReset /* 0x00 Reset handler */
62 undefvec:
63 0004 FEFFFFEA B undefvec /* 0x04 Undefined Instruction */
64 swivec:
65 0008 FEFFFFEA B swivec /* 0x08 Software Interrupt */
66 pabtvec:
67 000c FEFFFFEA B pabtvec /* 0x0C Prefetch Abort */
68 dabtvec:
69 0010 FEFFFFEA B dabtvec /* 0x10 Data Abort */
70 rsvdvec:
71 0014 FEFFFFEA B rsvdvec /* 0x14 reserved */
72 irqvec:
73 0018 FEFFFFEA B IRQ_Handler_Entry /* 0x18 IRQ */
74 fiqvec: /* 0x1c FIQ */
75 /*------------------------------------------------------------------------------
76 //*- Function : FIQ_Handler_Entry
77 //*- Treatments : FIQ Controller Interrupt Handler.
78 //*- Called Functions : AIC_FVR[interrupt]
79 //*------------------------------------------------------------------------------*/
80
81 FIQ_Handler_Entry:
82
83 /*- Switch in SVC/User Mode to allow User Stack access for C code */
84 /* because the FIQ is not yet acknowledged*/
85
86 /*- Save and r0 in FIQ_Register */
87 001c 0090A0E1 mov r9,r0
88 0020 040198E5 ldr r0 , [r8, #AIC_FVR]
89 0024 D3F021E3 msr CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
90
91 /*- Save scratch/used registers and LR in User Stack */
92 0028 0E502DE9 stmfd sp!, { r1-r3, r12, lr}
93
94 /*- Branch to the routine pointed by the AIC_FVR */
95 002c 0FE0A0E1 mov r14, pc
96 0030 10FF2FE1 bx r0
97
98 /*- Restore scratch/used registers and LR from User Stack */
99 0034 0E50BDE8 ldmia sp!, { r1-r3, r12, lr}
100
101 /*- Leave Interrupts disabled and switch back in FIQ mode */
102 0038 D1F021E3 msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
103
104 /*- Restore the R0 ARM_MODE_SVC register */
105 003c 0900A0E1 mov r0,r9
106
107 /*- Restore the Program Counter using the LR_fiq directly in the PC */
108 0040 04F05EE2 subs pc,lr,#4
109 .align 0
ARM GAS C:\DOCUME~1\pstang\LOCALS~1\Temp/cc2Zaaaa.s page 3
110 .RAM_TOP:
111 0044 00000000 .word Top_Stack
112
113 InitReset:
114 /*------------------------------------------------------------------------------
115 /*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
116 /*------------------------------------------------------------------------------*/
117 .extern AT91F_LowLevelInit
118 /*- minumum C initialization */
119 /*- call processorInit( void) */
120
121 0048 0CD01FE5 ldr r13,.RAM_TOP /* temporary stack in internal RAM */
122 /*--Call Low level init function in ABSOLUTE through the Interworking */
123 004c C4009FE5 ldr r0,=processorInit
124 0050 0FE0A0E1 mov lr, pc
125 0054 10FF2FE1 bx r0
126 /*------------------------------------------------------------------------------
127 //*- Stack Sizes Definition
128 //*------------------------
129 //*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
130 //*- the vectoring. This assume that the IRQ management.
131 //*- The Interrupt Stack must be adjusted depending on the interrupt handlers.
132 //*- Fast Interrupt not requires stack If in your application it required you must
133 //*- be definehere.
134 //*- The System stack size is not defined and is limited by the free internal
135 //*- SRAM.
136 //*------------------------------------------------------------------------------*/
137
138 /*------------------------------------------------------------------------------
139 //*- Top of Stack Definition
140 //*-------------------------
141 //*- Interrupt and Supervisor Stack are located at the top of internal memory in
142 //*- order to speed the exception handling context saving and restoring.
143 //*- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
144 //*------------------------------------------------------------------------------*/
145
146 .EQU IRQ_STACK_SIZE, (3*8*4)
147 .EQU ARM_MODE_FIQ, 0x11
148 .EQU ARM_MODE_IRQ, 0x12
149 .EQU ARM_MODE_SVC, 0x13
150
151 .EQU I_BIT, 0x80
152 .EQU F_BIT, 0x40
153
154 /*------------------------------------------------------------------------------
155 //*- Setup the stack for each mode
156 //*-------------------------------*/
157 0058 0D00A0E1 mov r0,r13
158
159 /*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
160 005c D1F021E3 msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
161 /*- Init the FIQ register*/
162 0060 B4809FE5 ldr r8, =AT91C_BASE_AIC
163
164 /*- Set up Interrupt Mode and set IRQ Mode Stack*/
165 0064 D2F021E3 msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
166 0068 00D0A0E1 mov r13, r0 /* Init stack IRQ */
ARM GAS C:\DOCUME~1\pstang\LOCALS~1\Temp/cc2Zaaaa.s page 4
167 006c 600040E2 sub r0, r0, #IRQ_Stack_Size
168 /*- Set up Supervisor Mode and set Supervisor Mode Stack*/
169 0070 13F021E3 msr CPSR_c, #ARM_MODE_SVC
170 0074 00D0A0E1 mov r13, r0 /* Init stack Sup */
171
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