msp430x21x2_ta1_21.c

msp430f21x2程序例程

//******************************************************************************
//  MSP430F21x2 Demo - Timer1_A2, PWM TA1_1, Up/Down Mode, HF XTAL ACLK
//
//  Description: This program generates one PWM output on P3.7 using
//  Timer1_A2 configured for up/down mode. The value in TA1CCR0, 128, defines the
//  PWM period/2 and the values in TA1CCR1 the PWM duty cycle.
//  Using HF XTAL ACLK as TA1CLK, the timer period is HF XTAL/256 with a 75%
//  duty cycle on P3.7.
//  ACLK = MCLK = TA1CLK = HF XTAL
//  /* HF XTAL REQUIRED AND NOT INSTALLED ON FET */
//  /* Min Vcc required varies with MCLK frequency - refer to datasheet */
//
//               MSP430F21x2
//            -----------------
//        /|\|              XIN|-
//         | |                 | HF XTAL (3