msp430x21x2_ta1_15.c

msp430f21x2程序例程

//******************************************************************************
//  MSP430F21x2 Demo - Timer1_A2, Toggle P3.6/TA1_1, Up/Down Mode, HF XTAL ACLK
//
//  Description: Toggle P3.6 using hardware TA0_1 output. Timer1_A2 is configured
//  for up/down mode with TA1CCR0 defining period.
//  In this example, TA1CCR0 is loaded with 250 and TA0_1 will toggle P3.6 at
//  T1ACLK/2*250. Thus the output frequency on P3.7 will be the TA1CLK/1000.
//  No CPU or software resources required.
//  ACLK = MCLK = TA1CLK = HF XTAL
//  //* HF XTAL REQUIRED AND NOT INSTALLED ON FET *//
//  //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//  As coded with TACLK = ACLK, P1.1 output frequency = HF XTAL/1000
//
//            MSP430F21x2
//         -----------------
//     /|\|              XIN|-
//      | |                 | HF XTAL (3