msp430x21x2_ta0_21.c

msp430f21x2程序例程

//******************************************************************************
//  MSP430F21x2 Demo - Timer_A, PWM TA1-2, Up/Down Mode, HF XTAL ACLK
//
//  Description: This program generates two PWM outputs on P1.2/1.3 using
//  Timer0_A3 configured for up/down mode. The value in TA0CCR0, 128, defines the
//  PWM period/2 and the values in TA0CCR1 and TA0CCR2 the PWM duty cycles.
//  Using HF XTAL ACLK as TACLK, the timer period is HF XTAL/256 with a 75%
//  duty cycle on P1.2 and 25% on P1.3.
//  ACLK = MCLK = TA0CLK = HF XTAL
//  //* HF XTAL REQUIRED AND NOT INSTALLED ON FET *//
//  //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//
//               MSP430F21x2
//            -----------------
//        /|\|              XIN|-
//         | |                 | HF XTAL (3