rx2flash.ls1
来自「mifarea卡程序mifarea卡程序mifarea卡程序」· LS1 代码 · 共 747 行 · 第 1/3 页
LS1
747 行
234 ; #define SFCM_PB 0x0E; /*Byte-Program IAP cmd*/
235 ; /********************************************
236 ; * Global Variable Definition
237 ; *********************************************/
238 ; const unsigned short int BLK1_DST_ADDR = 0x1000;
239 ; /*SST89x564RD destination address (in the other on-chip flash memory block)
240 ; where data will be written to, which is above BSL code space.*/
241 ;
242 ; const unsigned char SECT_SIZE = 0x80; /*number of bytes in a sector*/
243 ;
244 ; // test if operation is ready
245 ; bool ready()
246
---- 247 RSEG ?PR?ready?RX2FLASH
0000 248 ready:
249 USING 0
250 ; SOURCE LINE # 46
251 ; {
252 ; SOURCE LINE # 47
253 ; unsigned long int TimeOut = 0;
254 ; SOURCE LINE # 48
0000 900000 F 255 MOV DPTR,#TimeOut?040
A51 MACRO ASSEMBLER RX2FLASH 03/13/2009 15:44:57 PAGE 5
0003 120000 F 256 LCALL ?C?LSTKXDATA
0006 00 257 DB 00H
0007 00 258 DB 00H
0008 00 259 DB 00H
0009 00 260 DB 00H
000A 261 ?C0001:
262 ;
263 ; while (TimeOut < 100000)
264 ; SOURCE LINE # 50
000A 7FA0 265 MOV R7,#0A0H
000C 7E86 266 MOV R6,#086H
000E 7D01 267 MOV R5,#01H
0010 7C00 268 MOV R4,#00H
0012 900000 F 269 MOV DPTR,#TimeOut?040
0015 E0 270 MOVX A,@DPTR
0016 F8 271 MOV R0,A
0017 A3 272 INC DPTR
0018 E0 273 MOVX A,@DPTR
0019 F9 274 MOV R1,A
001A A3 275 INC DPTR
001B E0 276 MOVX A,@DPTR
001C FA 277 MOV R2,A
001D A3 278 INC DPTR
001E E0 279 MOVX A,@DPTR
001F FB 280 MOV R3,A
0020 C3 281 CLR C
0021 120000 F 282 LCALL ?C?ULCMP
0024 5011 283 JNC ?C0002
284 ; {
285 ; SOURCE LINE # 51
286 ; if ((SFST&4) == 0) /* Check if IAP is done */
287 ; SOURCE LINE # 52
0026 E5B6 288 MOV A,SFST
0028 20E207 289 JB ACC.2,?C0003
290 ; { /* IAP is done */
291 ; SOURCE LINE # 53
292 ; SFCF = SFCF & 0xBF; /* turn off IAP*/
293 ; SOURCE LINE # 54
002B 53B1BF 294 ANL SFCF,#0BFH
295 ; SFDT = 0; /* any value other than 0x55 */
296 ; SOURCE LINE # 55
002E E4 297 CLR A
002F F5B5 298 MOV SFDT,A
299 ; return true; /* IAP operation is completed*/
300 ; SOURCE LINE # 56
0031 22 301 RET
302 ; }
303 ; SOURCE LINE # 57
0032 304 ?C0003:
305 ; GetTickCount();
306 ; SOURCE LINE # 58
0032 120000 F 307 LCALL GetTickCount
308 ; }
309 ; SOURCE LINE # 59
0035 80D3 310 SJMP ?C0001
0037 311 ?C0002:
312 ; SFCF = SFCF & 0xBF; /*turn off IAP*/
313 ; SOURCE LINE # 60
0037 53B1BF 314 ANL SFCF,#0BFH
315 ; SFDT = 0; /*any value other than 0x55*/
316 ; SOURCE LINE # 61
003A E4 317 CLR A
003B F5B5 318 MOV SFDT,A
319 ; return false; /*IAP operation is NOT completed before time out*/
320 ; SOURCE LINE # 62
003D C3 321 CLR C
A51 MACRO ASSEMBLER RX2FLASH 03/13/2009 15:44:57 PAGE 6
322 ; }
323 ; SOURCE LINE # 63
003E 324 ?C0004:
003E 22 325 RET
326 ; END OF ready
327
328 ;
329 ; // write a byte to flash
330 ; bool FlashWrByte(uint addr, uchar ch)
331
---- 332 RSEG ?PR?_FlashWrByte?RX2FLASH
0000 333 _FlashWrByte:
334 USING 0
335 ; SOURCE LINE # 66
336 ;---- Variable 'addr?141' assigned to Register 'R2/R3' ----
0000 CB 337 XCH A,R3
0001 EF 338 MOV A,R7
0002 CB 339 XCH A,R3
0003 CA 340 XCH A,R2
0004 EE 341 MOV A,R6
0005 CA 342 XCH A,R2
343 ;---- Variable 'ch?142' assigned to Register 'R5' ----
344 ; {
345 ; SOURCE LINE # 67
346 ; disable();
347 ; SOURCE LINE # 68
0006 C2AF 348 CLR EA
349 ; SFCF = SFCF | 0x40; /*enable IAP */
350 ; SOURCE LINE # 69
0008 43B140 351 ORL SFCF,#040H
352 ; SFAH = addr>>8; /*load high order address byte*/
353 ; SOURCE LINE # 70
000B EA 354 MOV A,R2
000C F5B4 355 MOV SFAH,A
356 ; SFAL = addr & 0xff; /*load low order address byte */
357 ; SOURCE LINE # 71
000E EB 358 MOV A,R3
000F F5B3 359 MOV SFAL,A
360 ; SFDT = ch; /*load data to be programmed */
361 ; SOURCE LINE # 72
0011 CF 362 XCH A,R7
0012 ED 363 MOV A,R5
0013 CF 364 XCH A,R7
0014 8FB5 365 MOV SFDT,R7
366 ; SFCM = SFCM_PB; /*issue byte program command */
367 ; SOURCE LINE # 73
0016 75B20E 368 MOV SFCM,#0EH
369 ;
370 ; if(!ready())
371 ; SOURCE LINE # 75
0019 120000 F 372 LCALL ready
001C 4003 373 JC ?C0005
374 ; {
375 ; SOURCE LINE # 76
376 ; enable();
377 ; SOURCE LINE # 77
001E D2AF 378 SETB EA
379 ; return false;
380 ; SOURCE LINE # 78
0020 22 381 RET
382 ; }
383 ; SOURCE LINE # 79
0021 384 ?C0005:
385 ;
386 ; enable();
387 ; SOURCE LINE # 81
A51 MACRO ASSEMBLER RX2FLASH 03/13/2009 15:44:57 PAGE 7
0021 D2AF 388 SETB EA
389 ; return true;
390 ; SOURCE LINE # 82
0023 D3 391 SETB C
392 ; }
393 ; SOURCE LINE # 83
0024 394 ?C0006:
0024 22 395 RET
396 ; END OF _FlashWrByte
397
398 ;
399 ; // erase sector
400 ; // addr: 00h, 80h
401 ; bool FlashErSector(uint addr)
402
---- 403 RSEG ?PR?_FlashErSector?RX2FLASH
0000 404 _FlashErSector:
405 USING 0
406 ; SOURCE LINE # 87
407 ;---- Variable 'addr?243' assigned to Register 'R4/R5' ----
0000 CD 408 XCH A,R5
0001 EF 409 MOV A,R7
0002 CD 410 XCH A,R5
0003 CC 411 XCH A,R4
0004 EE 412 MOV A,R6
0005 CC 413 XCH A,R4
414 ; {
415 ; SOURCE LINE # 88
416 ; disable();
417 ; SOURCE LINE # 89
0006 C2AF 418 CLR EA
419 ; SFCF = SFCF | 0x40; /*enable IAP */
420 ; SOURCE LINE # 90
0008 43B140 421 ORL SFCF,#040H
422 ; SFAH = addr>>8; /*load high order address byte*/
423 ; SOURCE LINE # 91
000B EC 424 MOV A,R4
000C F5B4 425 MOV SFAH,A
426 ; SFAL = addr & 0xff; /*load low order address byte */
427 ; SOURCE LINE # 92
000E ED 428 MOV A,R5
000F F5B3 429 MOV SFAL,A
430 ; SFCM = SFCM_SE; /*issue sector erase command */
431 ; SOURCE LINE # 93
0011 75B20B 432 MOV SFCM,#0BH
433 ;
434 ; if(!ready())
435 ; SOURCE LINE # 95
0014 120000 F 436 LCALL ready
0017 4003 437 JC ?C0007
438 ; {
439 ; SOURCE LINE # 96
440 ; enable();
441 ; SOURCE LINE # 97
0019 D2AF 442 SETB EA
443 ; return false;
444 ; SOURCE LINE # 98
001B 22 445 RET
446 ; }
447 ; SOURCE LINE # 99
001C 448 ?C0007:
449 ;
450 ; enable();
451 ; SOURCE LINE # 101
001C D2AF 452 SETB EA
453 ; return true;
A51 MACRO ASSEMBLER RX2FLASH 03/13/2009 15:44:57 PAGE 8
454 ; SOURCE LINE # 102
001E D3 455 SETB C
456 ; }
457 ; SOURCE LINE # 103
001F 458 ?C0008:
001F 22 459 RET
460 ; END OF _FlashErSector
461
462 ;
463 ; // read device data
464 ; uchar FlashRdByte(uint addr)
465
---- 466 RSEG ?PR?_FlashRdByte?RX2FLASH
0000 467 _FlashRdByte:
468 USING 0
469 ; SOURCE LINE # 106
470 ;---- Variable 'addr?344' assigned to Register 'R4/R5' ----
0000 CD 471 XCH A,R5
0001 EF 472 MOV A,R7
0002 CD 473 XCH A,R5
0003 CC 474 XCH A,R4
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