v51rx2.h

mifarea卡程序mifarea卡程序mifarea卡程序

#ifndef V51RX2_H
#define V51RX2_H

#define V51RX2

sfr  FST = 0xB6;    // flash status byte
sfr  WDTC = 0xC0;
sfr  WDTD = 0x85;

sfr  AUXR    =   0x8E; 			 
//sfr  CKCON   =   0x8F;			 

sfr  AUXR1  =   0xA2;              
sfr  WDTRST  =   0xA6;			 
sfr  WDTPRG  =   0xA7;			 

sfr  SADDR   =   0xA9;			 

sfr  IPH    =   0xB7;			     
sfr  IPH0    =   0xB7;

sfr  SADEN   =   0xB9;			 

sfr  IPL    =   0xB8;			     
sfr  IPL0    =   0xB8;

//sfr   EECON  =   0xD2;  /* EEPROM Control Register */
//sfr   EETIM  =   0xD3;  /* EEPROM Timing Control Register */
//sfr   FCON   =   0xD1;  /* Flash API, ISP */

sfr  CCON    =   0xD8;			 
/*
sbit  CF      =   CCON^7;
sbit  CR      =   CCON^6;
sbit  CCF4    =   CCON^4;
sbit  CCF3    =   CCON^3;
sbit  CCF2    =   CCON^2;
sbit  CCF1    =   CCON^1;
sbit  CCF0    =   CCON^0;
*/
sfr  CMOD    =   0xD9;			 
sfr  CCAPM0  =   0xDA;			 
sfr  CCAPM1  =   0xDB;			 
sfr  CCAPM2  =   0xDC;			 
sfr  CCAPM3  =   0xDD;			 
sfr  CCAPM4  =   0xDE;			 

sfr  P5      =   0xE8;	
sfr  CL      =   0xE9;			 
sfr  CCAP0L  =   0xEA;			 
sfr  CCAP1L  =   0xEB;			 
sfr  CCAP2L  =   0xEC;			 
sfr  CCAP3L  =   0xED;			 
sfr  CCAP4L  =   0xEE;			 
sfr  CH      =   0xF9;			 
sfr  CCAP0H  =   0xFA;			 
sfr  CCAP1H  =   0xFB;			  
sfr  CCAP2H  =   0xFC;			 
sfr  CCAP3H  =   0xFD;			 
sfr  CCAP4H  =   0xFE;			 


#endif