📄 mfrc500.ls1
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889 ; SOURCE LINE # 45
890 ; info->cmd= 0;
891 ; SOURCE LINE # 46
0000 E4 892 CLR A
0001 120000 F 893 LCALL ?C?CSTPTR
894 ; info->status = MI_OK;
895 ; SOURCE LINE # 47
0004 900001 896 MOV DPTR,#01H
0007 120000 F 897 LCALL ?C?CSTOPTR
898 ; info->irqSource= 0;
899 ; SOURCE LINE # 48
000A 900007 900 MOV DPTR,#07H
000D E4 901 CLR A
000E 120000 F 902 LCALL ?C?CSTOPTR
903 ; info->nBytesToSend = 0;
904 ; SOURCE LINE # 49
0011 900003 905 MOV DPTR,#03H
0014 E4 906 CLR A
0015 120000 F 907 LCALL ?C?CSTOPTR
908 ; info->nBytesSent = 0;
909 ; SOURCE LINE # 50
0018 900002 910 MOV DPTR,#02H
001B E4 911 CLR A
001C 120000 F 912 LCALL ?C?CSTOPTR
913 ; info->nBytesReceived = 0;
914 ; SOURCE LINE # 51
001F 900004 915 MOV DPTR,#04H
A51 MACRO ASSEMBLER MFRC500 03/13/2009 15:44:54 PAGE 15
0022 E4 916 CLR A
0023 120000 F 917 LCALL ?C?CSTOPTR
918 ; info->nBitsReceived = 0;
919 ; SOURCE LINE # 52
0026 900005 920 MOV DPTR,#05H
0029 E4 921 CLR A
002A F5F0 922 MOV B,A
002C 120000 F 923 LCALL ?C?ISTOPTR
924 ; info->collPos = 0;
925 ; SOURCE LINE # 53
002F 900008 926 MOV DPTR,#08H
0032 E4 927 CLR A
0033 020000 F 928 LJMP ?C?CSTOPTR
929 ; END OF _ResetInfo
930
931 ; }
932 ;
933 ; void SetBitMask(uchar reg,uchar mask)
934
---- 935 RSEG ?PR?_SetBitMask?MFRC500
0000 936 _SetBitMask:
937 USING 0
938 ; SOURCE LINE # 56
0000 900000 F 939 MOV DPTR,#mask?142
0003 ED 940 MOV A,R5
0004 F0 941 MOVX @DPTR,A
0005 900000 F 942 MOV DPTR,#reg?141
0008 EF 943 MOV A,R7
0009 F0 944 MOVX @DPTR,A
945 ; {
946 ; SOURCE LINE # 57
947 ; uchar data tmp = 0x0;
948 ; SOURCE LINE # 58
000A E4 949 CLR A
000B F500 F 950 MOV tmp?143,A
951 ; tmp = ReadIO(reg);
952 ; SOURCE LINE # 59
000D 120000 F 953 LCALL _ReadIO
0010 8F00 F 954 MOV tmp?143,R7
955 ; WriteIO(reg,tmp | mask);
956 ; SOURCE LINE # 60
0012 900000 F 957 MOV DPTR,#reg?141
0015 E0 958 MOVX A,@DPTR
0016 FF 959 MOV R7,A
0017 A3 960 INC DPTR
0018 E0 961 MOVX A,@DPTR
0019 4500 F 962 ORL A,tmp?143
001B FD 963 MOV R5,A
001C 020000 F 964 LJMP _WriteIO
965 ; END OF _SetBitMask
966
967 ; }
968 ;
969 ; void ClearBitMask(uchar reg,uchar mask)
970
---- 971 RSEG ?PR?_ClearBitMask?MFRC500
0000 972 L?0396:
973 USING 0
0000 974 L?0397:
0000 7D08 975 MOV R5,#08H
0002 7F09 976 MOV R7,#09H
0004 977 _ClearBitMask:
978 USING 0
979 ; SOURCE LINE # 63
0004 900000 F 980 MOV DPTR,#mask?245
0007 ED 981 MOV A,R5
A51 MACRO ASSEMBLER MFRC500 03/13/2009 15:44:54 PAGE 16
0008 F0 982 MOVX @DPTR,A
0009 900000 F 983 MOV DPTR,#reg?244
000C EF 984 MOV A,R7
000D F0 985 MOVX @DPTR,A
986 ; {
987 ; SOURCE LINE # 64
988 ; uchar tmp = 0x0;
989 ; SOURCE LINE # 65
990 ;---- Variable 'tmp?246' assigned to Register 'R6' ----
000E E4 991 CLR A
000F FE 992 MOV R6,A
993 ; tmp = ReadIO(reg);
994 ; SOURCE LINE # 66
0010 120000 F 995 LCALL _ReadIO
0013 CE 996 XCH A,R6
0014 EF 997 MOV A,R7
0015 CE 998 XCH A,R6
999 ; WriteIO(reg,tmp & ~mask);
1000 ; SOURCE LINE # 67
0016 900000 F 1001 MOV DPTR,#reg?244
0019 E0 1002 MOVX A,@DPTR
001A FF 1003 MOV R7,A
001B A3 1004 INC DPTR
001C E0 1005 MOVX A,@DPTR
001D F4 1006 CPL A
001E 5E 1007 ANL A,R6
001F FD 1008 MOV R5,A
0020 020000 F 1009 LJMP _WriteIO
1010 ; END OF _ClearBitMask
1011
1012 ; }
1013 ;
1014 ; // clear fifo
1015 ; void FlushFIFO(void)
1016
---- 1017 RSEG ?PR?FlushFIFO?MFRC500
0000 1018 FlushFIFO:
1019 USING 0
1020 ; SOURCE LINE # 71
1021 ; {
1022 ; SOURCE LINE # 72
1023 ; SetBitMask(RegControl,0x01);
1024 ; SOURCE LINE # 73
0000 7D01 1025 MOV R5,#01H
0002 7F09 1026 MOV R7,#09H
0004 020000 F 1027 LJMP _SetBitMask
1028 ; END OF FlushFIFO
1029
1030 ; }
1031 ;
1032 ; /************************************
1033 ; * set timeout length *
1034 ; * tmolength: timeout length *
1035 ; ************************************/
1036 ; void M500PcdSetTmo(uchar tmoLength)
1037
---- 1038 RSEG ?PR?_M500PcdSetTmo?MFRC500
0000 1039 L?0400:
1040 USING 0
0000 900000 F 1041 MOV DPTR,#MInfo+03H
0003 F0 1042 MOVX @DPTR,A
0004 7F03 1043 MOV R7,#03H
0006 1044 _M500PcdSetTmo:
1045 USING 0
1046 ; SOURCE LINE # 80
0006 900000 F 1047 MOV DPTR,#tmoLength?447
A51 MACRO ASSEMBLER MFRC500 03/13/2009 15:44:54 PAGE 17
0009 EF 1048 MOV A,R7
000A F0 1049 MOVX @DPTR,A
1050 ; {
1051 ; SOURCE LINE # 81
1052 ; switch(tmoLength)
1053 ; SOURCE LINE # 82
000B 14 1054 DEC A
000C B40700 1055 CJNE A,#07H,?C0347
000F 1056 ?C0347:
000F 5070 1057 JNC ?C0013
0011 900000 F 1058 MOV DPTR,#?C0348
0014 75F003 1059 MOV B,#03H
0017 A4 1060 MUL AB
0018 C583 1061 XCH A,DPH
001A 25F0 1062 ADD A,B
001C C583 1063 XCH A,DPH
001E 73 1064 JMP @A+DPTR
001F 1065 ?C0348:
001F 020000 F 1066 LJMP ?C0006
0022 020000 F 1067 LJMP ?C0007
0025 020000 F 1068 LJMP ?C0008
0028 020000 F 1069 LJMP ?C0009
002B 020000 F 1070 LJMP ?C0010
002E 020000 F 1071 LJMP ?C0011
0031 020000 F 1072 LJMP ?C0012
1073 ; {
1074 ; SOURCE LINE # 83
1075 ; case 1:
1076 ; SOURCE LINE # 84
0034 1077 ?C0006:
1078 ; WriteIO(RegTimerClock,0x07);
1079 ; SOURCE LINE # 85
0034 7D07 1080 MOV R5,#07H
0036 7F2A 1081 MOV R7,#02AH
0038 120000 F 1082 LCALL _WriteIO
1083 ; WriteIO(RegTimerReload,0x6a);
1084 ; SOURCE LINE # 86
003B 7D6A 1085 MOV R5,#06AH
1086 ; break;
1087 ; SOURCE LINE # 87
003D 804E 1088 SJMP ?C0375
1089 ; case 2:
1090 ; SOURCE LINE # 88
003F 1091 ?C0007:
1092 ; WriteIO(RegTimerClock,0x07);
1093 ; SOURCE LINE # 89
003F 7D07 1094 MOV R5,#07H
0041 7F2A 1095 MOV R7,#02AH
0043 120000 F 1096 LCALL _WriteIO
1097 ; WriteIO(RegTimerReload,0xa0);
1098 ; SOURCE LINE # 90
0046 7DA0 1099 MOV R5,#0A0H
0048 1100 ?C0369:
1101 ; break;
1102 ; SOURCE LINE # 91
0048 8043 1103 SJMP ?C0375
1104 ; case 3:
1105 ; SOURCE LINE # 92
004A 1106 ?C0008:
1107 ; WriteIO(RegTimerClock,0x09);
1108 ; SOURCE LINE # 93
004A 7D09 1109 MOV R5,#09H
004C 7F2A 1110 MOV R7,#02AH
004E 120000 F 1111 LCALL _WriteIO
1112 ; WriteIO(Re
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