📄 ucio.src
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; .\out_sst89e564\ucio.SRC generated from: source\ucio.c
; COMPILER INVOKED BY:
; C:\Keil\C51\BIN\C51.EXE source\ucio.c LARGE BROWSE ORDER NOAREGS DEBUG OBJECTEXTEND PRINT(.\ucio.lst) SRC(.\out_sst89e564\ucio.SRC)
$NOMOD51
NAME UCIO
P0 DATA 080H
SP DATA 081H
DPL DATA 082H
DPH DATA 083H
PCON DATA 087H
TCON DATA 088H
TMOD DATA 089H
TL0 DATA 08AH
TL1 DATA 08BH
TH0 DATA 08CH
TH1 DATA 08DH
P1 DATA 090H
SCON DATA 098H
SBUF DATA 099H
P2 DATA 0A0H
IE DATA 0A8H
P3 DATA 0B0H
IP DATA 0B8H
T2CON DATA 0C8H
T2MOD DATA 0C9H
RCAP2L DATA 0CAH
RCAP2H DATA 0CBH
TL2 DATA 0CCH
TH2 DATA 0CDH
PSW DATA 0D0H
ACC DATA 0E0H
B DATA 0F0H
P0_0 BIT 080H.0
P0_1 BIT 080H.1
P0_2 BIT 080H.2
P0_3 BIT 080H.3
P0_4 BIT 080H.4
P0_5 BIT 080H.5
P0_6 BIT 080H.6
P0_7 BIT 080H.7
IT0 BIT 088H.0
IE0 BIT 088H.1
IT1 BIT 088H.2
IE1 BIT 088H.3
TR0 BIT 088H.4
TF0 BIT 088H.5
TR1 BIT 088H.6
TF1 BIT 088H.7
P1_0 BIT 090H.0
P1_1 BIT 090H.1
P1_2 BIT 090H.2
P1_3 BIT 090H.3
P1_4 BIT 090H.4
P1_5 BIT 090H.5
P1_6 BIT 090H.6
P1_7 BIT 090H.7
T2 BIT 090H.0
T2EX BIT 090H.1
RI BIT 098H.0
TI BIT 098H.1
RB8 BIT 098H.2
TB8 BIT 098H.3
REN BIT 098H.4
SM2 BIT 098H.5
SM1 BIT 098H.6
SM0 BIT 098H.7
P2_0 BIT 0A0H.0
P2_1 BIT 0A0H.1
P2_2 BIT 0A0H.2
P2_3 BIT 0A0H.3
P2_4 BIT 0A0H.4
P2_5 BIT 0A0H.5
P2_6 BIT 0A0H.6
P2_7 BIT 0A0H.7
EX0 BIT 0A8H.0
ET0 BIT 0A8H.1
EX1 BIT 0A8H.2
ET1 BIT 0A8H.3
ES BIT 0A8H.4
ET2 BIT 0A8H.5
EA BIT 0A8H.7
P3_0 BIT 0B0H.0
P3_1 BIT 0B0H.1
P3_2 BIT 0B0H.2
P3_3 BIT 0B0H.3
P3_4 BIT 0B0H.4
P3_5 BIT 0B0H.5
P3_6 BIT 0B0H.6
P3_7 BIT 0B0H.7
RXD BIT 0B0H.0
TXD BIT 0B0H.1
INT0 BIT 0B0H.2
INT1 BIT 0B0H.3
T0 BIT 0B0H.4
T1 BIT 0B0H.5
WR BIT 0B0H.6
RD BIT 0B0H.7
PX0 BIT 0B8H.0
PT0 BIT 0B8H.1
PX1 BIT 0B8H.2
PT1 BIT 0B8H.3
PS BIT 0B8H.4
PT2 BIT 0B8H.5
CP_RL2 BIT 0C8H.0
C_T2 BIT 0C8H.1
TR2 BIT 0C8H.2
EXEN2 BIT 0C8H.3
TCLK BIT 0C8H.4
RCLK BIT 0C8H.5
EXF2 BIT 0C8H.6
TF2 BIT 0C8H.7
P BIT 0D0H.0
FL BIT 0D0H.1
OV BIT 0D0H.2
RS0 BIT 0D0H.3
RS1 BIT 0D0H.4
F0 BIT 0D0H.5
AC BIT 0D0H.6
CY BIT 0D0H.7
FST DATA 0B6H
WDTC DATA 0C0H
WDTD DATA 085H
AUXR DATA 08EH
AUXR1 DATA 0A2H
WDTRST DATA 0A6H
WDTPRG DATA 0A7H
SADDR DATA 0A9H
IPH DATA 0B7H
IPH0 DATA 0B7H
SADEN DATA 0B9H
IPL DATA 0B8H
IPL0 DATA 0B8H
CCON DATA 0D8H
CMOD DATA 0D9H
CCAPM0 DATA 0DAH
CCAPM1 DATA 0DBH
CCAPM2 DATA 0DCH
CCAPM3 DATA 0DDH
CCAPM4 DATA 0DEH
P5 DATA 0E8H
CL DATA 0E9H
CCAP0L DATA 0EAH
CCAP1L DATA 0EBH
CCAP2L DATA 0ECH
CCAP3L DATA 0EDH
CCAP4L DATA 0EEH
CH DATA 0F9H
CCAP0H DATA 0FAH
CCAP1H DATA 0FBH
CCAP2H DATA 0FCH
CCAP3H DATA 0FDH
CCAP4H DATA 0FEH
?PR?_WriteRawIO?UCIO SEGMENT CODE
?PR?_ReadRawIO?UCIO SEGMENT CODE
?PR?_WriteIO?UCIO SEGMENT CODE
?PR?_ReadIO?UCIO SEGMENT CODE
PUBLIC _ReadIO
PUBLIC _WriteIO
PUBLIC _ReadRawIO
PUBLIC _WriteRawIO
; #include <reg52.h>
; #include <absacc.h> // 包含绝对地址访问宏
; #include <ucio.h>
; #include <v51rx2.h>
;
;
; #ifndef disable
; #define disable() EA = 0
; #define enable() EA = 1
; #endif
;
; /********************************
; * write io port at address *
; ********************************/
; void WriteRawIO(unsigned char Address, unsigned char value)
RSEG ?PR?_WriteRawIO?UCIO
L?0005:
USING 0
MOV A,R6
RRC A
RRC A
RRC A
ANL A,#01FH
ORL A,#080H
MOV R5,A
CLR A
MOV R7,A
_WriteRawIO:
USING 0
; SOURCE LINE # 15
;---- Variable 'value?041' assigned to Register 'R5' ----
;---- Variable 'Address?040' assigned to Register 'R7' ----
; {
; SOURCE LINE # 16
; #ifdef V51RX2
; disable();
; SOURCE LINE # 18
CLR EA
; AUXR |= 0x02;
; SOURCE LINE # 19
ORL AUXR,#02H
; #endif
;
; PBYTE[Address]=value;
; SOURCE LINE # 22
XCH A,R0
MOV A,R7
XCH A,R0
MOV A,R5
MOVX @R0,A
;
; #ifdef V51RX2
; AUXR &= 0xfd;
; SOURCE LINE # 25
ANL AUXR,#0FDH
; enable();
; SOURCE LINE # 26
SETB EA
; #endif
; }
; SOURCE LINE # 28
RET
; END OF _WriteRawIO
;
; /********************************
; * write io port from address *
; * return the value read *
; ********************************/
; unsigned char ReadRawIO(unsigned char Address)
RSEG ?PR?_ReadRawIO?UCIO
_ReadRawIO:
USING 0
; SOURCE LINE # 34
;---- Variable 'Address?142' assigned to Register 'R7' ----
; {
; SOURCE LINE # 35
; unsigned char c;
;
; #ifdef V51RX2
; disable();
; SOURCE LINE # 39
CLR EA
; AUXR |= 0x02;
; SOURCE LINE # 40
ORL AUXR,#02H
; #endif
;
; c = PBYTE[Address];
; SOURCE LINE # 43
XCH A,R0
MOV A,R7
XCH A,R0
MOVX A,@R0
MOV R7,A
;---- Variable 'c?143' assigned to Register 'R7' ----
;
; #ifdef V51RX2
; AUXR &= 0xfd;
; SOURCE LINE # 46
ANL AUXR,#0FDH
; enable();
; SOURCE LINE # 47
SETB EA
; #endif
;
; return c;
; SOURCE LINE # 50
; }
; SOURCE LINE # 51
?C0002:
RET
; END OF _ReadRawIO
;
; void WriteIO(unsigned char address, unsigned char value)
RSEG ?PR?_WriteIO?UCIO
_WriteIO:
USING 0
; SOURCE LINE # 53
;---- Variable 'address?244' assigned to Register 'R6' ----
XCH A,R6
MOV A,R7
XCH A,R6
;---- Variable 'value?245' assigned to Register 'R4' ----
XCH A,R4
MOV A,R5
XCH A,R4
; {
; SOURCE LINE # 54
; WriteRawIO(0x00,GetRegPage(address)); // select appropriate page
; SOURCE LINE # 55
LCALL L?0005
; WriteRawIO(address, value);
; SOURCE LINE # 56
XCH A,R7
MOV A,R6
XCH A,R7
XCH A,R6
MOV A,R4
XCH A,R6
XCH A,R5
MOV A,R6
XCH A,R5
LJMP _WriteRawIO
; END OF _WriteIO
; }
;
; unsigned char ReadIO(unsigned char address)
RSEG ?PR?_ReadIO?UCIO
_ReadIO:
USING 0
; SOURCE LINE # 59
;---- Variable 'address?346' assigned to Register 'R6' ----
XCH A,R6
MOV A,R7
XCH A,R6
; {
; SOURCE LINE # 60
; WriteRawIO(0x00,GetRegPage(address)); // select appropriate page
; SOURCE LINE # 61
LCALL L?0005
; return ReadRawIO(address);
; SOURCE LINE # 62
XCH A,R7
MOV A,R6
XCH A,R7
LCALL _ReadRawIO
; }
; SOURCE LINE # 63
?C0004:
RET
; END OF _ReadIO
END
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