quant_vhd.vhd

IDCT - xlinix design in vhdl

         load_intra_qmatrix_reg1 <= '0';    
         load_non_intra_qmatrix_reg1 <= '0';    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         IF (rdy_in = '1' AND cnt64 = "1000000") THEN
            
            -- fork <<X-HDL>>
               macroblock_type_reg1 <= macroblock_type;    
               quant_scale_code_reg1 <= quant_scale_code;    
               quant_scale_type_reg1 <= quant_scale_type;    
               load_intra_qmatrix_reg1 <= load_intra_qmatrix;    
               load_non_intra_qmatrix_reg1 <= load_non_intra_qmatrix;    
            -- join <<X-HDL>>
            
         ELSE
            
         END IF;
      END IF;
   END PROCESS;

   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         quant_scale_code_reg2 <= "00000";    
         quant_scale_type_reg2 <= '0';    
         load_intra_qmatrix_reg2 <= '0';    
         load_non_intra_qmatrix_reg2 <= '0';    
         load_intra_qmatrix_reg3 <= '0';    
         load_non_intra_qmatrix_reg3 <= '0';    
         load_intra_qmatrix_reg4 <= '0';    
         load_non_intra_qmatrix_reg4 <= '0';    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         IF (rdy_in = '1') THEN
            
            -- fork <<X-HDL>>
               quant_scale_code_reg2 <= quant_scale_code_reg1;    
               quant_scale_type_reg2 <= quant_scale_type_reg1;    
               load_intra_qmatrix_reg2 <= load_intra_qmatrix_reg1;    
               load_non_intra_qmatrix_reg2 <= 
               load_non_intra_qmatrix_reg1;    
               load_intra_qmatrix_reg3 <= load_intra_qmatrix_reg2;    
               load_non_intra_qmatrix_reg3 <= 
               load_non_intra_qmatrix_reg2;    
               load_intra_qmatrix_reg4 <= load_intra_qmatrix_reg3;    
               load_non_intra_qmatrix_reg4 <= 
               load_non_intra_qmatrix_reg3;    
            -- join <<X-HDL>>
            
         ELSE
            
         END IF;
      END IF;
   END PROCESS;

   --***************************************************************************
   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         macroblock_type_pipe1 <= '0';    
         macroblock_type_pipe2 <= '0';    
         macroblock_type_pipe3 <= '0';    
         macroblock_type_pipe4 <= '0';    
         macroblock_type_pipe5 <= '0';    
         macroblock_type_pipe6 <= '0';    
         macroblock_type_pipe7 <= '0';    
         macroblock_type_pipe8 <= '0';    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         macroblock_type_pipe2 <= macroblock_type_reg1;    
         macroblock_type_pipe3 <= macroblock_type_pipe2;    
         macroblock_type_pipe4 <= macroblock_type_pipe3;    
         macroblock_type_pipe5 <= macroblock_type_pipe4;    
         macroblock_type_pipe6 <= macroblock_type_pipe5;    
         macroblock_type_pipe7 <= macroblock_type_pipe6;    
         macroblock_type_pipe8 <= macroblock_type_pipe7;    
      END IF;
   END PROCESS;

   --***************************************************************************
   -- read in dct values: pipe1 
   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         dct_in_pipe1 <= "000000000000";    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         IF (rdy_in = '1') THEN
            dct_in_pipe1 <= dct_in;    
         END IF;
      END IF;
   END PROCESS;
   temp4 <= ( not(dct_in_pipe1(10 DOWNTO 0)) + 1)  WHEN dct_in_pipe1(11) = 
   '1' ELSE dct_in_pipe1(10 DOWNTO 0);

   -- register dct_out_reg . This is done to match the pipeline stage with that of 
   --  register dct_out_reg . This is done to match the pipeline stage with that of 
   --    prod1 which has 4 pipe stages at the output of first multiplier . the 11th  
   --    bit is registered once more to match the pipe stage in the calculation of  
   --    prod2_sign 
   
   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         dct_in_pipe2 <= "00000000000";    
         dct_in_pipe2_sign <= '0';    
         dct_in_pipe3 <= "00000000000";    
         dct_in_pipe3_sign <= '0';    
         dct_in_pipe4 <= "00000000000";    
         dct_in_pipe4_sign <= '0';    
         dct_in_pipe5 <= "00000000000";    
         dct_in_pipe5_sign <= '0';    
         dct_in_pipe6 <= "00000000000";    
         dct_in_pipe6_sign <= '0';    
         dct_in_pipe7 <= "00000000000";    
         dct_in_pipe7_sign <= '0';    
         dct_in_pipe8_sign <= '0';    
         dct_in_pipe9_sign <= '0';    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         dct_in_pipe2 <= temp4;    
         dct_in_pipe2_sign <= dct_in_pipe1(11);    
         dct_in_pipe3 <= dct_in_pipe2;    
         dct_in_pipe3_sign <= dct_in_pipe2_sign;    
         dct_in_pipe4 <= dct_in_pipe3;    
         dct_in_pipe4_sign <= dct_in_pipe3_sign;    
         dct_in_pipe5 <= dct_in_pipe4;    
         dct_in_pipe5_sign <= dct_in_pipe4_sign;    
         dct_in_pipe6 <= dct_in_pipe5;    
         dct_in_pipe6_sign <= dct_in_pipe5_sign;    
         dct_in_pipe7 <= dct_in_pipe6;    
         dct_in_pipe7_sign <= dct_in_pipe6_sign;    
         dct_in_pipe8_sign <= dct_in_pipe7_sign;    
         dct_in_pipe9_sign <= dct_in_pipe8_sign;    
      END IF;
   END PROCESS;
   --***************************************************************************
   -- store 32/(2*quant_scale_code) in q_scale_mem1 and q_scale_mem2. Q_scale_type is 
   --  store 32/(2*quant_scale_code) in q_scale_mem1 and q_scale_mem2. Q_scale_type is 
   -- used to choose between the 2 memories. q_scale_mem output active after 3 clks
   -- 2clk pipe stages for the qscale_mem_sel signal, 1 more clk for the q_scale_mem
   -- output signal 
   qscale_mem_sel <= cnt_start & quant_scale_type_reg2 & 
   quant_scale_code_reg2 ;

   PROCESS (CLK)
   BEGIN
      IF (CLK'EVENT AND CLK = '1') THEN
        CASE qscale_mem_sel IS
            WHEN "1000001" => q_scale_mem <= "0100000000000";    -- 2; 8      
            WHEN "1000010" => q_scale_mem <= "0010000000000";    -- 4; 4      
            WHEN "1000011" => q_scale_mem <= "0001010101010";    -- 6; 2.667  
            WHEN "1000100" => q_scale_mem <= "0001000000000";    -- 8; 2      
            WHEN "1000101" => q_scale_mem <= "0000110011001";    -- 10; 1.6   
            WHEN "1000110" => q_scale_mem <= "0000101010111";    -- 12; 1.334 
            WHEN "1000111" => q_scale_mem <= "0000100100011";    -- 14; 1.142 
            WHEN "1001000" => q_scale_mem <= "0000100000000";    -- 16; 1     
            WHEN "1001001" => q_scale_mem <= "0000011100011";    -- 18; 0.889 
            WHEN "1001010" => q_scale_mem <= "0000011001100";    -- 20; 0.8   
            WHEN "1001011" => q_scale_mem <= "0000010111010";    -- 22; 0.727 
            WHEN "1001100" => q_scale_mem <= "0000010101010";    -- 24; 0.667 
            WHEN "1001101" => q_scale_mem <= "0000010011101";    -- 26; 0.615 
            WHEN "1001110" => q_scale_mem <= "0000010010010";    -- 28; 0.571 
            WHEN "1001111" => q_scale_mem <= "0000010001000";    -- 30; 0.534 
            WHEN "1010000" => q_scale_mem <= "0000010000000";    -- 32; 0.5   
            WHEN "1010001" => q_scale_mem <= "0000001111000";    -- 34; 0.470 
            WHEN "1010010" => q_scale_mem <= "0000001110001";    -- 36; 0.445 
            WHEN "1010011" => q_scale_mem <= "0000001101011";    -- 38; 0.421 
            WHEN "1010100" => q_scale_mem <= "0000001100110";    -- 40; 0.4   
            WHEN "1010101" => q_scale_mem <= "0000001100001";    -- 42; 0.380 
            WHEN "1010110" => q_scale_mem <= "0000001011101";    -- 44; 0.364 
            WHEN "1010111" => q_scale_mem <= "0000001011001";    -- 46; 0.348 
            WHEN "1011000" => q_scale_mem <= "0000001010101";    -- 48; 0.334 
            WHEN "1011001" => q_scale_mem <= "0000001010001";    -- 50; 0.32  
            WHEN "1011010" => q_scale_mem <= "0000001001110";    -- 52; 0.308 
            WHEN "1011011" => q_scale_mem <= "0000001001011";    -- 54; 0.296 
            WHEN "1011100" => q_scale_mem <= "0000001001001";    -- 56; 0.286 
            WHEN "1011101" => q_scale_mem <= "0000001000110";    -- 58; 0.276 
            WHEN "1011110" => q_scale_mem <= "0000001000100";    -- 60; 0.267 
            WHEN "1011111" => q_scale_mem <= "0000001000010";    -- 62; 0.258 
            WHEN "1100001" => q_scale_mem <= "1000000000000";    -- 1; 16 
            WHEN "1100010" => q_scale_mem <= "0100000000000";    -- 2; 8 
            WHEN "1100011" => q_scale_mem <= "0000001010101";    -- 3; 5.334 
            WHEN "1100100" => q_scale_mem <= "0010000000000";    -- 4; 4 
            WHEN "1100101" => q_scale_mem <= "0000000110011";    -- 5; 3.2 
            WHEN "1100110" => q_scale_mem <= "0001010101010";    -- 6; 2.667 
            WHEN "1100111" => q_scale_mem <= "0000001001001";    -- 7; 2.286 
            WHEN "1101000" => q_scale_mem <= "0001000000000";    -- 8; 2 
            WHEN "1101001" => q_scale_mem <= "0000110011001";    -- 10; 1.6 
            WHEN "1101010" => q_scale_mem <= "0000101010111";    -- 12; 1.334 
            WHEN "1101011" => q_scale_mem <= "0000100100011";    -- 14; 1.143 
            WHEN "1101100" => q_scale_mem <= "0000100000000";    -- 16; 1 
            WHEN "1101101" => q_scale_mem <= "0000011100011";    -- 18; 0.889 
            WHEN "1101110" => q_scale_mem <= "0000011001100";    -- 20; 0.8 
            WHEN "1101111" => q_scale_mem <= "0000010111010";    -- 22; 0.727 
            WHEN "1110000" => q_scale_mem <= "0000010101010";    -- 24; 0.667 
            WHEN "1110001" => q_scale_mem <= "0000010010010";    -- 28; 0.571 
            WHEN "1110010" => q_scale_mem <= "0000010000000";    -- 32; 0.5 
            WHEN "1110011" => q_scale_mem <= "0000001110001";    -- 36; 0.445 
            WHEN "1110100" => q_scale_mem <= "0000001100110";    -- 40; 0.4 
            WHEN "1110101" => q_scale_mem <= "0000001011101";    -- 44; 0.364 
            WHEN "1110110" => q_scale_mem <= "0000001010101";    -- 48; 0.334 
            WHEN "1110111" => q_scale_mem <= "0000001001110";    -- 52; 0.308 
            WHEN "1111000" => q_scale_mem <= "0000001001001";    -- 56; 0.286 
            WHEN "1111001" => q_scale_mem <= "0000001000000";    -- 64; 0.25 
            WHEN "1111010" => q_scale_mem <= "0000000111000";    -- 72; 0.222 
            WHEN "1111011" => q_scale_mem <= "0000000110011";    -- 80; 0.2 
            WHEN "1111100" => q_scale_mem <= "0000000101110";    -- 88; 0.182 
            WHEN "1111101" => q_scale_mem <= "0000000101010";    -- 96; 0.167 
            WHEN "1111110" => q_scale_mem <= "0000000100111";    -- 104; 0.154 
            WHEN "1111111" => q_scale_mem <= "0000000100100";    
            WHEN  OTHERS  => q_scale_mem <= "0000000000000";    
         END CASE;
      END IF;
   END PROCESS;

   --end
   
   --qscale_reg1 active after 4 clks 
   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         qscale_reg1 <= "0000000000000";    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         IF (rdy_in = '1') THEN
            qscale_reg1 <= q_scale_mem;    
         END IF;
      END IF;
   END PROCESS;

   -- qscale_reg2 active after 5 clks 
   PROCESS (CLK, RST)
   BEGIN
      IF (RST = '1') THEN
         qscale_reg2 <= "0000000000000";    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         qscale_reg2 <= qscale_reg1;    
      END IF;
   END PROCESS;
   --***************************************************************************
   --***************************************************************************
   --***************************************************************************
   -- Two 64x8 memories to store the default intra and non-intra Qmatrix. 1clk for
   --  Two 64x8 memories to store the default intra and non-intra Qmatrix. 1clk for
   -- the def_qmem_sel signal, 2nd clk for the def_q_mem signal. 
   def_qmem_sel <= cnt_start & macroblock_type_reg1 & cnt64b ;

   PROCESS (RST, CLK)
   BEGIN
      IF (RST = '1') THEN
         def_q_mem <= (OTHERS => '0');    
      ELSIF (CLK'EVENT AND CLK = '1') THEN
         CASE def_qmem_sel IS
         WHEN "101000000" => def_q_mem <= "00001000";    
         WHEN "100000001" => def_q_mem <= "00010000";    
         WHEN "100000010" => def_q_mem <= "00010011";    
         WHEN "100000011" => def_q_mem <= "00010110";    
         WHEN "100000100" => def_q_mem <= "00011010";    
         WHEN "100000101" => def_q_mem <= "00011011";    
         WHEN "100000110" => def_q_mem <= "00011101";    
         WHEN "100000111" => def_q_mem <= "00100010";    
         WHEN "100001000" => def_q_mem <= "00010000";    
         WHEN "100001001" => def_q_mem <= "00010000";    
         WHEN "100001010" => def_q_mem <= "00010110";    
         WHEN "100001011" => def_q_mem <= "00011000";    
         WHEN "100001100" => def_q_mem <= "00011011";    
         WHEN "100001101" => def_q_mem <= "00011101";    
         WHEN "100001110" => def_q_mem <= "00100010";    
         WHEN "100001111" => def_q_mem <= "00100101";    
         WHEN "100010000" => def_q_mem <= "00010011";    
         WHEN "100010001" => def_q_mem <= "00010110";    
         WHEN "100010010" => def_q_mem <= "00011010";    
         WHEN "100010011" => def_q_mem <= "00011011";    
         WHEN "100010100" => def_q_mem <= "00011101";    
         WHEN "100010101" => def_q_mem <= "00100010";    
         WHEN "100010110" => def_q_mem <= "00100010";    
         WHEN "100010111" => def_q_mem <= "00100110";