bq_smbus.sdb

用PIC16F73编写的SMBUS通信测试程序

[p AUTOSTATIC PIC14 PICMIDHI PICLOMID ]
"9 d:\HT-PIC\INCLUDE\pic16715.h
[v _TMR0 `Vuc  1 s 1 @1 ]
"10
[v _PCL `Vuc  1 s 1 @2 ]
"11
[v _STATUS `Vuc  1 s 1 @3 ]
"12
[v _FSR `uc  1 s 1 @4 ]
"13
[v _PORTA `Vuc  1 s 1 @5 ]
"14
[v _PORTB `Vuc  1 s 1 @6 ]
"17
[v _DATACCP `Vuc  1 s 1 @7 ]
"20
[v _PCLATH `uc  1 s 1 @10 ]
"21
[v _INTCON `Vuc  1 s 1 @11 ]
"22
[v _PIR1 `Vuc  1 s 1 @12 ]
"25
[v _TMR1L `Vuc  1 s 1 @14 ]
"26
[v _TMR1H `Vuc  1 s 1 @15 ]
"27
[v _T1CON `Vuc  1 s 1 @16 ]
"28
[v _TMR2 `Vuc  1 s 1 @17 ]
"29
[v _T2CON `Vuc  1 s 1 @18 ]
"30
[v _CCPR1L `Vuc  1 s 1 @21 ]
"31
[v _CCPR1H `Vuc  1 s 1 @22 ]
"32
[v _CCP1CON `Vuc  1 s 1 @23 ]
"35
[v _ADRES `Vuc  1 s 1 @30 ]
"36
[v _ADCON0 `Vuc  1 s 1 @31 ]
"38
[v _OPTION `Xuc  1 s 1 @129 ]
"39
[v _TRISA `VXuc  1 s 1 @133 ]
"40
[v _TRISB `VXuc  1 s 1 @134 ]
"42
[v _TRISCCP `VXuc  1 s 1 @135 ]
"44
[v _PIE1 `VXuc  1 s 1 @140 ]
"45
[v _PCON `VXuc  1 s 1 @142 ]
"47
[v _PR2 `VXuc  1 s 1 @146 ]
"49
[v _ADCON1 `VXuc  1 s 1 @159 ]
"52
[v _RP0 `Vb  1 s 0 @29 ]
"53
[v _TO `Vb  1 s 0 @28 ]
"54
[v _PD `Vb  1 s 0 @27 ]
"55
[v _ZERO `Vb  1 s 0 @26 ]
"56
[v _DC `Vb  1 s 0 @25 ]
"57
[v _CARRY `Vb  1 s 0 @24 ]
"60
[v _RA4 `Vb  1 s 0 @44 ]
"61
[v _RA3 `Vb  1 s 0 @43 ]
"62
[v _RA2 `Vb  1 s 0 @42 ]
"63
[v _RA1 `Vb  1 s 0 @41 ]
"64
[v _RA0 `Vb  1 s 0 @40 ]
"67
[v _RB7 `Vb  1 s 0 @55 ]
"68
[v _RB6 `Vb  1 s 0 @54 ]
"69
[v _RB5 `Vb  1 s 0 @53 ]
"70
[v _RB4 `Vb  1 s 0 @52 ]
"71
[v _RB3 `Vb  1 s 0 @51 ]
"72
[v _RB2 `Vb  1 s 0 @50 ]
"73
[v _RB1 `Vb  1 s 0 @49 ]
"74
[v _RB0 `Vb  1 s 0 @48 ]
"78
[v _DCCP `Vb  1 s 0 @58 ]
"79
[v _DT1CK `Vb  1 s 0 @56 ]
"83
[v _GIE `Vb  1 s 0 @95 ]
"84
[v _PEIE `Vb  1 s 0 @94 ]
"85
[v _T0IE `Vb  1 s 0 @93 ]
"86
[v _INTE `Vb  1 s 0 @92 ]
"87
[v _RBIE `Vb  1 s 0 @91 ]
"88
[v _T0IF `Vb  1 s 0 @90 ]
"89
[v _INTF `Vb  1 s 0 @89 ]
"90
[v _RBIF `Vb  1 s 0 @88 ]
"93
[v _ADIF `Vb  1 s 0 @102 ]
"95
[v _CCP1IF `Vb  1 s 0 @98 ]
"96
[v _TMR2IF `Vb  1 s 0 @97 ]
"97
[v _TMR1IF `Vb  1 s 0 @96 ]
"102
[v _T1CKPS1 `Vb  1 s 0 @133 ]
"103
[v _T1CKPS0 `Vb  1 s 0 @132 ]
"104
[v _T1OSCEN `Vb  1 s 0 @131 ]
"105
[v _T1SYNC `Vb  1 s 0 @130 ]
"106
[v _TMR1CS `Vb  1 s 0 @129 ]
"107
[v _TMR1ON `Vb  1 s 0 @128 ]
"110
[v _TOUTPS3 `Vb  1 s 0 @150 ]
"111
[v _TOUTPS2 `Vb  1 s 0 @149 ]
"112
[v _TOUTPS1 `Vb  1 s 0 @148 ]
"113
[v _TOUTPS0 `Vb  1 s 0 @147 ]
"114
[v _TMR2ON `Vb  1 s 0 @146 ]
"115
[v _T2CKPS1 `Vb  1 s 0 @145 ]
"116
[v _T2CKPS0 `Vb  1 s 0 @144 ]
"119
[v _DC1B1 `Vb  1 s 0 @189 ]
"120
[v _DC1B0 `Vb  1 s 0 @188 ]
"121
[v _CCP1M3 `Vb  1 s 0 @187 ]
"122
[v _CCP1M2 `Vb  1 s 0 @186 ]
"123
[v _CCP1M1 `Vb  1 s 0 @185 ]
"124
[v _CCP1M0 `Vb  1 s 0 @184 ]
"128
[v _ADCS1 `Vb  1 s 0 @255 ]
"129
[v _ADCS0 `Vb  1 s 0 @254 ]
"130
[v _CHS2 `Vb  1 s 0 @253 ]
"131
[v _CHS1 `Vb  1 s 0 @252 ]
"132
[v _CHS0 `Vb  1 s 0 @251 ]
"133
[v _ADGO `Vb  1 s 0 @250 ]
"134
[v _ADON `Vb  1 s 0 @248 ]
"137
[v _RBPU `Xb  1 s 0 @1039 ]
"138
[v _INTEDG `Xb  1 s 0 @1038 ]
"139
[v _T0CS `Xb  1 s 0 @1037 ]
"140
[v _T0SE `Xb  1 s 0 @1036 ]
"141
[v _PSA `Xb  1 s 0 @1035 ]
"142
[v _PS2 `Xb  1 s 0 @1034 ]
"143
[v _PS1 `Xb  1 s 0 @1033 ]
"144
[v _PS0 `Xb  1 s 0 @1032 ]
"147
[v _TRISA5 `VXb  1 s 0 @1069 ]
"148
[v _TRISA4 `VXb  1 s 0 @1068 ]
"149
[v _TRISA3 `VXb  1 s 0 @1067 ]
"150
[v _TRISA2 `VXb  1 s 0 @1066 ]
"151
[v _TRISA1 `VXb  1 s 0 @1065 ]
"152
[v _TRISA0 `VXb  1 s 0 @1064 ]
"155
[v _TRISB7 `VXb  1 s 0 @1079 ]
"156
[v _TRISB6 `VXb  1 s 0 @1078 ]
"157
[v _TRISB5 `VXb  1 s 0 @1077 ]
"158
[v _TRISB4 `VXb  1 s 0 @1076 ]
"159
[v _TRISB3 `VXb  1 s 0 @1075 ]
"160
[v _TRISB2 `VXb  1 s 0 @1074 ]
"161
[v _TRISB1 `VXb  1 s 0 @1073 ]
"162
[v _TRISB0 `VXb  1 s 0 @1072 ]
"166
[v _TCCP `VXb  1 s 0 @1082 ]
"167
[v _TT1CK `VXb  1 s 0 @1080 ]
"171
[v _ADIE `VXb  1 s 0 @1126 ]
"173
[v _CCP1IE `VXb  1 s 0 @1122 ]
"174
[v _TMR2IE `VXb  1 s 0 @1121 ]
"175
[v _TMR1IE `VXb  1 s 0 @1120 ]
"183
[v _POR `VXb  1 s 0 @1137 ]
"184
[v _BOR `VXb  1 s 0 @1136 ]
"187
[v _PCFG1 `VXb  1 s 0 @1273 ]
"188
[v _PCFG0 `VXb  1 s 0 @1272 ]
"12 d:\HT-PIC\INCLUDE\delay.c
[v _DelayMs `(v  1 e 0 0 ]
{
[v _cnt `uc  1 a 1 w ]
"20
[v _i `uc  1 a 1 0 ]
"21
[v _cnt `uc  1 a 1 1 ]
"24
{
[v __dcnt `uc  1 a 1 2 ]
}
"28
} 3
"21 E:\WORK\TEST\SMBUS\i2c.c
[v _i2c_Stop `(v  1 e 0 0 ]
{
"27
{
[v __dcnt `uc  1 a 1 0 ]
}
"29
{
[v __dcnt `uc  1 a 1 0 ]
}
"31
{
[v __dcnt `uc  1 a 1 0 ]
}
"35
} 1
"45
[v _i2c_Restart `(v  1 e 0 0 ]
{
"49
{
[v __dcnt `uc  1 a 1 0 ]
}
"52
{
[v __dcnt `uc  1 a 1 0 ]
}
"55
{
[v __dcnt `uc  1 a 1 0 ]
}
"57
} 1
"66
[v _i2c_SendByte `(uc  1 e 1 0 ]
{
[v _byte `uc  1 a 1 w ]
"67
[v _i `c  1 a 1 0 ]
"69
[v _byte `uc  1 a 1 1 ]
"80
{
[v __dcnt `uc  1 a 1 2 ]
}
"86
{
[v __dcnt `uc  1 a 1 2 ]
}
"91
} 3
"101
[v _i2c_SendAddress `(uc  1 e 1 0 ]
{
[v _address `uc  1 a 1 w ]
[v _rw `uc  1 p 1 0 ]
"102
[v _address `uc  1 a 1 0 ]
"103
} 1
"112
[v _i2c_ReadAcknowledge `(c  1 e 1 0 ]
{
"113
[v _ack `uc  1 a 1 0 ]
"117
{
[v __dcnt `uc  1 a 1 1 ]
}
"119
{
[v __dcnt `uc  1 a 1 1 ]
}
"126
} 2
"135
[v _i2c_ReadByte `(i  1 e 2 0 ]
{
"136
[v _i `uc  1 a 1 0 ]
"137
[v _byte `uc  1 a 1 1 ]
"142
{
[v __dcnt `uc  1 a 1 2 ]
}
"148
{
[v __dcnt `uc  1 a 1 2 ]
}
"153
} 3
"162
[v _i2c_SendAcknowledge `(v  1 e 0 0 ]
{
[v _status `uc  1 a 1 w ]
"164
[v _status `uc  1 a 1 0 ]
"170
{
[v __dcnt `uc  1 a 1 1 ]
}
"172
{
[v __dcnt `uc  1 a 1 1 ]
}
"174
} 2
"183
[v _i2c_PutByte `(c  1 e 1 0 ]
{
[v _data `uc  1 a 1 w ]
"184
[v _data `uc  1 a 1 0 ]
"187
} 1
"196
[v _i2c_GetByte `(i  1 e 2 0 ]
{
[v _more `uc  1 a 1 w ]
"197
[v _byte `i  1 a 2 0 ]
"199
[v _more `uc  1 a 1 2 ]
"205
} 3
"214
[v _i2c_PutString `(i  1 e 2 0 ]
{
[v _str `*Cuc  1 p 2 0 ]
[v _length `uc  1 p 1 2 ]
"215
[v _error `c  1 a 1 0 ]
"229
} 1
"238
[v _i2c_GetString `(uc  1 e 1 0 ]
{
[v _str `*uc  1 a 1 w ]
[v _number `uc  1 p 1 0 ]
"239
[v _byte `i  1 a 2 0 ]
"241
[v _str `*uc  1 a 1 2 ]
"252
} 3
"262
[v _i2c_Open `(uc  1 e 1 0 ]
{
[v _address `uc  1 a 1 w ]
[v _mode `uc  1 p 1 0 ]
"264
[v _address `uc  1 a 1 0 ]
"269
} 1
"280
[v _i2c_WaitForSCL `(uc  1 e 1 0 ]
{
"285
{
[v __dcnt `uc  1 a 1 0 ]
}
"291
} 1
"294
[v _i2c_Free `(v  1 e 0 0 ]
{
"295
[v _ucI `uc  1 a 1 0 ]
"301
{
[v __dcnt `uc  1 a 1 1 ]
}
"303
{
[v __dcnt `uc  1 a 1 1 ]
}
"305
} 2
"308
[v _i2c_read `(uc  1 e 1 0 ]
{
[v _ucAdr `uc  1 a 1 w ]
"309
[v _ucDat `uc  1 a 1 0 ]
"311
[v _ucAdr `uc  1 a 1 1 ]
"319
} 2
"41 E:\WORK\TEST\SMBUS\i2c_2.c
[v _code `uc  0a e 0 0 ]
[v _code `uc  9a e 9 0 ]
"42
[v _no `uc  1 e 1 0 ]
[v _ack `uc  1 e 1 0 ]
[v _c `uc  1 e 1 0 ]
[v _data `uc  1 e 1 0 ]
"51
[v _start_i2c `(v  1 e 0 0 ]
{
"60
} 0
"69
[v _stop_i2c `(v  1 e 0 0 ]
{
"77
} 0
"87
[v _send_byte `(v  1 e 0 0 ]
{
[v _c `uc  1 a 1 w ]
"88
[v _bit_count `uc  1 a 1 0 ]
"89
[v _c `uc  1 a 1 1 ]
"107
} 2
"116
[v _receive_byte `(uc  1 e 1 0 ]
{
"117
[v _retc `uc  1 a 1 0 ]
[v _bit_count `uc  1 a 1 1 ]
"134
} 2
"137
[v _ReadByte_EE `(i  1 e 2 0 ]
{
[v _addr `uc  1 a 1 w ]
"138
[v _data1 `uc  1 a 1 0 ]
"140
[v _addr `uc  1 a 1 1 ]
"150
} 2
"160
[v _I_send_str `(v  1 e 0 0 ]
{
[v _sla `uc  1 a 1 w ]
[v _suba `uc  1 p 1 0 ]
[v _s `*uc  1 p 1 1 ]
[v _no `uc  1 p 1 2 ]
"161
[v _i `uc  1 a 1 0 ]
"163
[v _sla `uc  1 a 1 1 ]
"175
} 2
"184
[v _I_send_word `(v  1 e 0 0 ]
{
[v _sla `uc  1 a 1 w ]
[v _suba `uc  1 p 1 0 ]
[v _datal `uc  1 p 1 1 ]
[v _datah `uc  1 p 1 2 ]
"185
[v _i `uc  1 a 1 0 ]
"187
[v _sla `uc  1 a 1 1 ]
"197
} 2
"204
[v _delay_250ms `(v  1 e 0 0 ]
{
"205
[v _d `ui  1 a 2 0 ]
"207
} 2
"215
[v _i2c_error `(v  1 e 0 0 ]
{
"216
[v _i `uc  1 a 1 0 ]
"225
} 1
"25 E:\WORK\TEST\SMBUS\BQ_SMBUS.C
[v _code1 `uc  0a e 0 0 ]
[v _code1 `uc  9a e 9 0 ]
"26
[v _code2 `uc  0a e 0 0 ]
[v _code2 `uc  4a e 4 0 ]
"27
[v _code3 `uc  0a e 0 0 ]
[v _code3 `uc  4a e 4 0 ]
"28
[v _code4 `uc  0a e 0 0 ]
[v _code4 `uc  4a e 4 0 ]
"30
[v _flashled `(v  1 e 0 0 ]
{
"37
} 0
"40
[v _WriteByte `(v  1 e 0 0 ]
{
[v _addr `uc  1 a 1 w ]
[v _byte `uc  1 p 1 0 ]
"41
[v _addr `uc  1 a 1 0 ]
"46
} 1
"55
[v _ReadByte_smbus `(ui  1 e 2 0 ]
{
[v _addr `uc  1 a 1 w ]
"56
[v _data `ui  1 a 2 0 ]
"57
[v _data1 `uc  1 a 1 2 ]
[v _data2 `uc  1 a 1 3 ]
"58
[v _addr `uc  1 a 1 4 ]
"68
} 5
"74
[v _write_word_smbus `(v  1 e 0 0 ]
{
[v _addr `uc  1 a 1 w ]
[v _datal `uc  1 p 1 0 ]
[v _datah `uc  1 p 1 1 ]
"75
[v _data `ui  1 a 2 0 ]
"76
[v _data1 `uc  1 a 1 2 ]
[v _data2 `uc  1 a 1 3 ]
"77
[v _addr `uc  1 a 1 4 ]
"86
} 5
"91
[v _write_word_i2c `(v  1 e 0 0 ]
{
[v _addr `uc  1 a 1 w ]
[v _datal `uc  1 p 1 0 ]
[v _datah `uc  1 p 1 1 ]
"92
[v _data `ui  1 a 2 0 ]
"93
[v _data1 `uc  1 a 1 2 ]
[v _data2 `uc  1 a 1 3 ]
"94
[v _addr `uc  1 a 1 4 ]
"103
} 5
"105
[v _ReadWord `(i  1 e 2 0 ]
{
[v _addr `uc  1 a 1 w ]
"106
[v _data1 `uc  1 a 1 0 ]
[v _data2 `uc  1 a 1 1 ]
"107
[v _data `i  1 a 2 2 ]
"110
[v _addr `uc  1 a 1 4 ]
"124
} 5
"127
[v _remain `i  1 s 2 0 ]
[v _remain1 `i  1 s 2 0 ]
"129
[v _main `(v  1 e 0 0 ]
{
"130
[v _count `uc  1 a 1 0 ]
[v _val `uc  1 a 1 1 ]
"226
} 2