📄 uart.lst
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512:uart.c **** /******************************************************************************
513:uart.c **** *
514:uart.c **** * Function Name: uart1Write()
515:uart.c **** *
516:uart.c **** * Description:
517:uart.c **** * This function writes 'count' characters from 'buffer' to the UART
518:uart.c **** * output queue.
519:uart.c **** *
520:uart.c **** * Calling Sequence:
521:uart.c **** *
522:uart.c **** *
523:uart.c **** * Returns:
524:uart.c **** * 0 on success, -1 if insufficient room, -2 on error
525:uart.c **** * NOTE: if insufficient room, no characters are written.
526:uart.c **** *
527:uart.c **** *****************************************************************************/
528:uart.c **** int uart1Write(const char *buffer, uint16_t count)
529:uart.c **** {
733 1 534 0
734 mov r0, #0
735 ldmfd sp!, {r4, r5, r6, pc}
736 .LVL58:
737 0514 70402DE9 .L82:
738 .loc 1 531 0
739 mov r4, r6
740 0518 0118A0E1 .LVL59:
741 b .L85
742 051c 2168A0E1 .L86:
743 .loc 1 535 0
744 0520 0050A0E1 sub r3, r4, #1
530:uart.c **** #ifdef UART1_TX_INT_MODE
531:uart.c **** if (count > uart1Space())
745 asl #16
746 0524 FEFFFFEB mov r4, r3, lsr #16
747 .L85:
748 0528 000056E1 .loc 1 534 0
749 052c 0000E083 cmp r4, #0
750 0530 7080BD88 beq .L91
751 0534 010000EA ldrb r0, [r5], #1 @ zero_extendqisi2
752 bl uart1Putch
753 cmp r0, #0
532:uart.c **** return -1;
533:uart.c **** #endif
534:uart.c **** while (count && (uart1Putch(*buffer++) >= 0))
754
755 0538 0000A0E3 mvn r0, #1
756 053c 7080BDE8 .loc 1 538 0
757 ldmfd sp!, {r4, r5, r6, pc}
758 .LFE14:
760 0540 0640A0E1 .align 2
761 .global uart1TxEmpty
763 uart1TxEmpty:
535:uart.c **** count--;
764 .loc 1 557 0
765 0548 013044E2 @ args = 0, pretend = 0, frame = 0
766 054c 0338A0E1 @ frame_needed = 0, uses_anonymous_args = 0
767 0550 2348A0E1 @ link register save eliminated.
768 .LVL60:
769 .loc 1 558 0
770 0554 000054E3 ldr r3, .L94
771 0558 F6FFFF0A ldrb r0, [r3, #20] @ zero_extendqisi2
772 055c 0100D5E4 and r0, r0, #96
773 0560 FEFFFFEB .loc 1 559 0
774 0564 000050E3 cmp r0, #96
775 0568 F6FFFFAA movne r0, #0
776 056c 0100E0E3 moveq r0, #1
536:uart.c ****
537:uart.c **** return (count ? -2 : 0);
538:uart.c **** }
777
778 0570 7080BDE8 @ lr needed for prologue
779 .loc 1 559 0
780 bx lr
781 .L95:
782 .align 2
783 .L94:
784 .word -536805376
785 .LFE15:
539:uart.c ****
540:uart.c **** /******************************************************************************
541:uart.c **** *
542:uart.c **** * Function Name: uart1TxEmpty()
543:uart.c **** *
544:uart.c **** * Description:
545:uart.c **** * This function returns the status of the UART transmit data
546:uart.c **** * registers.
547:uart.c **** *
548:uart.c **** * Calling Sequence:
549:uart.c **** * void
550:uart.c **** *
551:uart.c **** * Returns:
552:uart.c **** * FALSE - either the tx holding or shift register is not empty
553:uart.c **** * !FALSE - if both the tx holding & shift registers are empty
554:uart.c **** *
555:uart.c **** *****************************************************************************/
556:uart.c **** int uart1TxEmpty(void)
557:uart.c **** {
786 art1TxEmpty, .-uart1TxEmpty
787 .align 2
788 .global uart1TxFlush
790 uart1TxFlush:
558:uart.c **** return (U1LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
791 6:
792 0574 14309FE5 .loc 1 577 0
793 0578 1400D3E5 @ args = 0, pretend = 0, frame = 0
794 057c 600000E2 @ frame_needed = 0, uses_anonymous_args = 0
559:uart.c **** }
795 61:
796 0580 600050E3 stmfd sp!, {r4, lr}
797 0584 0000A013 .LCFI10:
798 0588 0100A003 .loc 1 581 0
799 ldr r4, .L98
800 ldrb r3, [r4, #8] @ zero_extendqisi2
801 orr r3, r3, #4
802 058c 1EFF2FE1 strb r3, [r4, #8]
803 .loc 1 584 0
804 bl disableIRQ
805 .loc 1 585 0
806 0590 000001E0 ldrb r3, [r4, #4] @ zero_extendqisi2
807 and r3, r3, #253
808 strb r3, [r4, #4]
809 .loc 1 586 0
810 bl restoreIRQ
811 .loc 1 587 0
812 ldr r3, .L98+4
813 mov r2, #0
560:uart.c ****
561:uart.c **** /******************************************************************************
562:uart.c **** *
563:uart.c **** * Function Name: uart1TxFlush()
564:uart.c **** *
565:uart.c **** * Description:
566:uart.c **** * This function removes all characters from the UART transmit queue
567:uart.c **** * (without transmitting them).
568:uart.c **** *
569:uart.c **** * Calling Sequence:
570:uart.c **** * void
571:uart.c **** *
572:uart.c **** * Returns:
573:uart.c **** * void
574:uart.c **** *
575:uart.c **** *****************************************************************************/
576:uart.c **** void uart1TxFlush(void)
577:uart.c **** {
814 @ movhi
815 ldr r3, .L98+8
816 strh r2, [r3, #0] @ movhi
817 .loc 1 591 0
818 0594 10402DE9 ldmfd sp!, {r4, pc}
819 .L99:
578:uart.c **** #ifdef UART1_TX_INT_MODE
579:uart.c **** unsigned cpsr;
580:uart.c ****
581:uart.c **** U1FCR |= UFCR_TX_FIFO_RESET; // clear the TX fifo
820 n 2
821 0598 34409FE5 .L98:
822 059c 0830D4E5 .word -536805376
823 05a0 043083E3 .word uart1_tx_insert_idx
824 05a4 0830C4E5 .word uart1_tx_extract_idx
582:uart.c ****
583:uart.c **** // "Empty" the transmit buffer.
584:uart.c **** cpsr = disableIRQ(); // disable global interrupts
825 6:
585:uart.c **** U1IER &= ~UIER_ETBEI; // disable TX interrupts
827 align 2
828 05ac 0430D4E5 .global uart1Getch
830 05b4 0430C4E5 uart1Getch:
586:uart.c **** restoreIRQ(cpsr); // restore global interrupts
831 17:
832 05b8 FEFFFFEB .loc 1 608 0
587:uart.c **** uart1_tx_insert_idx = uart1_tx_extract_idx = 0;
833 args = 0, pretend = 0, frame = 0
834 05bc 14309FE5 @ frame_needed = 0, uses_anonymous_args = 0
835 05c0 0020A0E3 .LVL62:
836 05c4 B020C3E1 str lr, [sp, #-4]!
837 05c8 0C309FE5 .LCFI11:
838 05cc B020C3E1 .loc 1 612 0
588:uart.c **** #else
589:uart.c **** U1FCR |= UFCR_TX_FIFO_RESET; // clear the TX fifo
590:uart.c **** #endif
591:uart.c **** }
839 r, .L105
840 05d0 1080BDE8 ldrh r3, [lr, #0]
841 mov ip, r3, asl #16
842 ldr r3, .L105+4
843 mov r2, ip, lsr #16
844 05d4 000001E0 ldrh r1, [r3, #0]
845 05d8 00000000 .loc 1 615 0
846 05dc 00000000 add r3, r2, #1
847 .loc 1 616 0
848 and r3, r3, #127
849 .loc 1 612 0
850 cmp r1, r2
851 .loc 1 616 0
852 strneh r3, [lr, #0] @ movhi
853 .loc 1 615 0
592:uart.c ****
593:uart.c **** /******************************************************************************
594:uart.c **** *
595:uart.c **** * Function Name: uart1Getch()
596:uart.c **** *
597:uart.c **** * Description:
598:uart.c **** * This function gets a character from the UART receive queue
599:uart.c **** *
600:uart.c **** * Calling Sequence:
601:uart.c **** * void
602:uart.c **** *
603:uart.c **** * Returns:
604:uart.c **** * character on success, -1 if no character is available
605:uart.c **** *
606:uart.c **** *****************************************************************************/
607:uart.c **** int uart1Getch(void)
608:uart.c **** {
854 5+8
855 ldrneb r3, [r3, ip, lsr #16] @ zero_extendqisi2
856 .LVL63:
857 .loc 1 612 0
858 05e0 04E02DE5 mvn r0, #0
859 .loc 1 617 0
609:uart.c **** #ifdef UART1_RX_INT_MODE
610:uart.c **** uint8_t ch;
611:uart.c ****
612:uart.c **** if (uart1_rx_insert_idx == uart1_rx_extract_idx) // check if character is available
860 r0, r3
861 05e4 34E09FE5 .loc 1 624 0
862 05e8 B030DEE1 ldr pc, [sp], #4
863 05ec 03C8A0E1 .L106:
864 05f0 2C309FE5 .align 2
865 05f4 2C28A0E1 .L105:
866 05f8 B010D3E1 .word uart1_rx_extract_idx
613:uart.c **** return -1;
614:uart.c ****
615:uart.c **** ch = uart1_rx_buffer[uart1_rx_extract_idx++]; // get character, bump pointer
867 uart1_rx_insert_idx
868 05fc 013082E2 .word uart1_rx_buffer
616:uart.c **** uart1_rx_extract_idx %= UART1_RX_BUFFER_SIZE; // limit the pointer
869 FE17:
871 .comm uart1_tx_running,4,4
872 0604 020051E1 .comm uart1_tx_extract_idx,2,2
873 .comm uart1_tx_insert_idx,2,2
874 0608 B030CE11 .comm uart1_tx_buffer,128,1
875 .comm uart1_rx_extract_idx,2,2
876 060c 14309F15 .comm uart1_rx_insert_idx,2,2
877 0610 2C38D317 .comm uart1_rx_buffer,128,1
878 .comm uart0_tx_running,4,4
879 .comm uart0_tx_extract_idx,2,2
880 0614 0000E0E3 .comm uart0_tx_insert_idx,2,2
617:uart.c **** return ch;
881 _tx_buffer,128,1
882 0618 0300A011 .comm uart0_rx_extract_idx,2,2
618:uart.c **** #else
619:uart.c **** if (U1LSR & ULSR_RDR) // check if character is available
620:uart.c **** return U1RBR; // return character
621:uart.c ****
622:uart.c **** return -1;
623:uart.c **** #endif
624:uart.c **** }
883 comm uart0_rx_insert_idx,2,2
884 061c 04F09DE4 .comm uart0_rx_buffer,128,1
885 .section .debug_frame,"",%progbits
886 .Lframe0:
887 .4byte .LECIE0-.LSCIE0
888 0620 00000000 .LSCIE0:
889 0624 00000000 .4byte 0xffffffff
890 0628 00000000 .byte 0x1
891 .ascii "\000"
892 .uleb128 0x1
893 .sleb128 -4
894 .byte 0xe
895 .byte 0xc
896 .uleb128 0xd
897 .uleb128 0x0
898 .align 2
899 .LECIE0:
900 .LSFDE0:
901 .4byte .LEFDE0-.LASFDE0
902 .LASFDE0:
903 .4byte .Lframe0
904 .4byte .LFB2
905 .4byte .LFE2-.LFB2
906 .byte 0x4
1164 .4byte .LVL0-.Ltext0
DEFINED SYMBOLS
*ABS*:00000000 uart.c
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:13 .text:00000000 uart0Init
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:20 .text:00000000 $a
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:111 .text:000000bc $d
*COM*:00000002 uart0_tx_insert_idx
*COM*:00000002 uart0_tx_extract_idx
*COM*:00000002 uart0_rx_extract_idx
*COM*:00000004 uart0_tx_running
*COM*:00000002 uart0_rx_insert_idx
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:125 .text:000000e0 uart0Putch
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:131 .text:000000e0 $a
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:205 .text:00000180 $d
*COM*:00000080 uart0_tx_buffer
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:216 .text:00000198 uart0Space
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:224 .text:00000198 $a
C:\DOCUME~1\MINDAU~1\LOCALS~1\Temp/ccoNaaaa.s:245 .text:000001c4 $d
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