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📄 music.tan.rpt

📁 八音自动播放电子琴设计
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+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EP1C6Q240C8        ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same As Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                         ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk_153         ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk_153'                                                                                                                                                                                                                                                                                                               ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------+-----------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                             ; To                    ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------------------------------------+-----------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 80.81 MHz ( period = 12.375 ns )                    ; zhiyin:inst9|count2[1]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 12.463 ns               ;
; N/A                                     ; 81.75 MHz ( period = 12.232 ns )                    ; zhiyin:inst9|count2[3]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 12.320 ns               ;
; N/A                                     ; 81.88 MHz ( period = 12.213 ns )                    ; zhiyin:inst9|count2[2]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 12.280 ns               ;
; N/A                                     ; 83.34 MHz ( period = 11.999 ns )                    ; zhiyin:inst9|count2[4]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 12.066 ns               ;
; N/A                                     ; 84.62 MHz ( period = 11.817 ns )                    ; zhiyin:inst9|count2[0]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 11.905 ns               ;
; N/A                                     ; 85.40 MHz ( period = 11.710 ns )                    ; zhiyin:inst9|count2[5]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 11.777 ns               ;
; N/A                                     ; 85.65 MHz ( period = 11.675 ns )                    ; zhiyin:inst9|count2[1]                                                                           ; zhilv:inst|count3[0]  ; clk_153    ; clk_153  ; None                        ; None                      ; 11.793 ns               ;
; N/A                                     ; 86.52 MHz ( period = 11.558 ns )                    ; zhiyin:inst9|count2[6]                                                                           ; zhilv:inst|count3[10] ; clk_153    ; clk_153  ; None                        ; None                      ; 11.625 ns               ;
; N/A                                     ; 86.72 MHz ( period = 11.532 ns )                    ; zhiyin:inst9|count2[3]                                                                           ; zhilv:inst|count3[0]  ; clk_153    ; clk_153  ; None                        ; None                      ; 11.650 ns               ;
; N/A                                     ; 86.86 MHz ( period = 11.513 ns )                    ; zhiyin:inst9|count2[2]                                                                           ; zhilv:inst|count3[0]  ; clk_153    ; clk_153  ; None                        ; None                      ; 11.610 ns               ;
; N/A                                     ; 86.95 MHz ( period = 11.501 ns )                    ; zhiyin:inst9|count2[3]                                                                           ; zhilv:inst|count3[6]  ; clk_153    ; clk_153  ; None                        ; None                      ; 11.619 ns               ;
; N/A                                     ; 87.53 MHz ( period = 11.425 ns )                    ; zhiyin:inst9|count2[1]                                                                           ; zhilv:inst|count3[6]  ; clk_153    ; clk_153  ; None                        ; None                      ; 11.543 ns               ;

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