music.fit.rpt

八音自动播放电子琴设计

; Auto Merge PLLs                                    ; On                             ; On                             ;
; Perform Physical Synthesis for Combinational Logic ; Off                            ; Off                            ;
; Perform Register Duplication                       ; Off                            ; Off                            ;
; Perform Register Retiming                          ; Off                            ; Off                            ;
; Perform Asynchronous Signal Pipelining             ; Off                            ; Off                            ;
; Fitter Effort                                      ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                    ; Normal                         ; Normal                         ;
; Logic Cell Insertion - Logic Duplication           ; Auto                           ; Auto                           ;
; Auto Register Duplication                          ; Auto                           ; Auto                           ;
; Auto Global Clock                                  ; On                             ; On                             ;
; Auto Global Register Control Signals               ; On                             ; On                             ;
+----------------------------------------------------+--------------------------------+--------------------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in D:/我心依旧浪人情歌/music.pin.


+-----------------------------------------------------------------------+
; Fitter Resource Usage Summary                                         ;
+---------------------------------------------+-------------------------+
; Resource                                    ; Usage                   ;
+---------------------------------------------+-------------------------+
; Total logic elements                        ; 389 / 5,980 ( 7 % )     ;
;     -- Combinational with no register       ; 300                     ;
;     -- Register only                        ; 23                      ;
;     -- Combinational with a register        ; 66                      ;
;                                             ;                         ;
; Logic element usage by number of LUT inputs ;                         ;
;     -- 4 input functions                    ; 217                     ;
;     -- 3 input functions                    ; 34                      ;
;     -- 2 input functions                    ; 108                     ;
;     -- 1 input functions                    ; 16                      ;
;     -- 0 input functions                    ; 14                      ;
;                                             ;                         ;
; Logic elements by mode                      ;                         ;
;     -- normal mode                          ; 314                     ;
;     -- arithmetic mode                      ; 75                      ;
;     -- qfbk mode                            ; 18                      ;
;     -- register cascade mode                ; 0                       ;
;     -- synchronous clear/load mode          ; 46                      ;
;     -- asynchronous clear/load mode         ; 0                       ;
;                                             ;                         ;
; Total LABs                                  ; 54 / 598 ( 9 % )        ;
; Logic elements in carry chains              ; 80                      ;
; User inserted logic elements                ; 0                       ;
; Virtual pins                                ; 0                       ;
; I/O pins                                    ; 3 / 185 ( 2 % )         ;
;     -- Clock pins                           ; 1 / 2 ( 50 % )          ;
; Global signals                              ; 4                       ;
; M4Ks                                        ; 2 / 20 ( 10 % )         ;
; Total memory bits                           ; 5,120 / 92,160 ( 6 % )  ;
; Total RAM block bits                        ; 9,216 / 92,160 ( 10 % ) ;
; PLLs                                        ; 0 / 2 ( 0 % )           ;
; Global clocks                               ; 4 / 8 ( 50 % )          ;
; Maximum fan-out node                        ; zhiyin:inst9|count2[2]  ;
; Maximum fan-out                             ; 82                      ;
; Highest non-global fan-out signal           ; zhiyin:inst9|count2[2]  ;
; Highest non-global fan-out                  ; 82                      ;
; Total fan-out                               ; 1406                    ;
; Average fan-out                             ; 3.55                    ;
+---------------------------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                    ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; Name    ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Location assigned by ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; clk_153 ; 153   ; 3        ; 35           ; 12           ; 1           ; 51                    ; 0                  ; yes    ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; User                 ;
; key_60  ; 60    ; 1        ; 0            ; 1            ; 1           ; 1                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; User                 ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Pins                                                                                                                                                                                                                                                                                              ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+-------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Output Register ; Output Enable Register ; Power Up High ; Slow Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Location assigned by ; Load  ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+-------+
; sound ; 214   ; 2        ; 16           ; 21           ; 1           ; no              ; no                     ; no            ; no             ; no              ; no         ; no            ; no       ; Off          ; LVTTL        ; 24mA             ; Off         ; User                 ; 10 pF ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+----------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+-------+


+----------------------------------------------------------+
; I/O Bank Usage                                           ;
+----------+----------------+---------------+--------------+
; I/O Bank ; Usage          ; VCCIO Voltage ; VREF Voltage ;
+----------+----------------+---------------+--------------+
; 1        ; 3 / 44 ( 7 % ) ; 3.3V          ; --           ;
; 2        ; 1 / 48 ( 2 % ) ; 3.3V          ; --           ;
; 3        ; 1 / 45 ( 2 % ) ; 3.3V          ; --           ;
; 4        ; 0 / 48 ( 0 % ) ; 3.3V          ; --           ;
+----------+----------------+---------------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; All Package Pins                                                                                                                                                        ;
+----------+------------+----------+-------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; Location ; Pad Number ; I/O Bank ; Pin Name/Usage                            ; Dir.   ; I/O Standard ; Voltage ; I/O Type   ; User Assignment ; Bus Hold ; Weak Pull Up ;
+----------+------------+----------+-------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; 1        ; 0          ; 1        ; GND*                                      ;        ;              ;         ; Row I/O    ;                 ; no       ; Off          ;