gdb-5.3-bdm-m68k.patch

WaitForSingleObject 摩托罗拉的68k源程序

diff -Nru insight-5.3.orig/gdb/Makefile.in insight-5.3/gdb/Makefile.in
--- insight-5.3.orig/gdb/Makefile.in	2002-11-25 23:05:38.000000000 +0100
+++ insight-5.3/gdb/Makefile.in	2003-06-14 03:23:45.000000000 +0200
@@ -2009,6 +2009,8 @@
 	$(serial_h) $(regcache_h)
 remote-hms.o: remote-hms.c $(defs_h) $(gdbcore_h) $(target_h) $(monitor_h) \
 	$(serial_h) $(regcache_h)
+remote-m68k-bdm.o: remote-m68k-bdm.c $(bfd_h) $(wait_h) $(defs_h) $(inferior_h) \
+	$(gdbcore_h) $(target_h)
 remote-mips.o: remote-mips.c $(defs_h) $(inferior_h) $(bfd_h) $(symfile_h) \
 	$(gdbcmd_h) $(gdbcore_h) $(serial_h) $(target_h) $(remote_utils_h) \
 	$(gdb_string_h) $(gdb_stat_h) $(regcache_h)
diff -Nru insight-5.3.orig/gdb/config/m68k/bdm.mt insight-5.3/gdb/config/m68k/bdm.mt
--- insight-5.3.orig/gdb/config/m68k/bdm.mt	1970-01-01 01:00:00.000000000 +0100
+++ insight-5.3/gdb/config/m68k/bdm.mt	2003-06-14 03:23:46.000000000 +0200
@@ -0,0 +1,5 @@
+# Target: m68k bdm interface for the CPU32 and Coldfire processors.
+#
+TM_CLIBS= -L$(prefix)/lib -lBDM
+TDEPFILES= m68k-tdep.o remote-m68k-bdm.o
+TM_FILE= tm-bdm.h
diff -Nru insight-5.3.orig/gdb/config/m68k/tm-bdm.h insight-5.3/gdb/config/m68k/tm-bdm.h
--- insight-5.3.orig/gdb/config/m68k/tm-bdm.h	1970-01-01 01:00:00.000000000 +0100
+++ insight-5.3/gdb/config/m68k/tm-bdm.h	2003-06-14 03:23:46.000000000 +0200
@@ -0,0 +1,120 @@
+/*
+ * Target machine description for Coldfire BDM (Moto 5200)
+ * Copyright (C) 1995  W. Eric Norum
+ * Copyright (C) 1998  Chris Johns ([e-mail])
+ *
+ * Based on:
+ *  1. `A Background Debug Mode Driver Package for Motorola's
+ *     16- and 32-Bit Microcontrollers', Scott Howard, Motorola
+ *     Canada, 1993.
+ *  2. `Linux device driver for public domain BDM Interface',
+ *     M. Schraut, Technische Universitaet Muenchen, Lehrstuhl
+ *     fuer Prozessrechner, 1995.
+ *  3. BDM support for gdb by W. Eric Norum
+ *     Saskatchewan Accelerator Laboratory
+ *     University of Saskatchewan
+ *     107 North Road
+ *     Saskatoon, Saskatchewan, CANADA
+ *     S7N 5C6
+ * 
+ * This file is part of GDB.
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Coldfire does it for us if we use PCC to get the PC
+ */
+#define	DECR_PC_AFTER_BREAK	0
+
+/*
+ * We have to control this directly as the CPU32 and Coldfire have different
+ * breakpoint opcodes.
+ */
+#define BREAKPOINT_FROM_PC m68k_bdm_breakpoint_from_pc
+
+/*
+ * Include the generic stuff
+ */
+#include "m68k/tm-m68k.h"
+
+/*
+ * Override some of the generic definitions
+ */
+
+/*
+ * For uCLinux we need to detect we have a subroutine call
+ * which is really a trap #0. This should be caught by the
+ * the IN_SIGTRAMP handler defined above, but incase it is
+ * not we should try and catch it here.
+ */
+
+extern CORE_ADDR m68k_bdm_saved_pc_after_call PARAMS ((struct frame_info *));
+
+#undef SAVED_PC_AFTER_CALL
+#define SAVED_PC_AFTER_CALL(frame) \
+  m68k_bdm_saved_pc_after_call (frame)
+
+/*
+ * we need 40 registers for the CPU32 and Coldfire:
+ *   8 data registers
+ *   8 address registers
+ *   2 other registers (PC, PS)
+ *  22 special registers (actual set depends on architecture)
+ *   0 floating point registers
+ */
+#undef NUM_REGS
+#undef REGISTER_BYTES
+#define NUM_REGS    40
+#define REGISTER_BYTES (16*4 + 2*4 + 22*4)
+
+#undef REGISTER_NAMES
+#define REGISTER_NAME(i) bdm_register_name(i)
+extern const char *bdm_register_name(int i);
+
+#undef FP0_REGNUM
+#undef FPC_REGNUM
+#undef FPS_REGNUM
+#undef FPI_REGNUM
+#define FP0_REGNUM 40                   /* Floating point register 0 */
+#define FPC_REGNUM FP0_REGNUM + 8       /* 68881 control register */
+#define FPS_REGNUM FPC_REGNUM + 1       /* 68881 status register */
+#define FPI_REGNUM FPS_REGNUM + 1       /* 68881 iaddr register */
+
+/*
+ * The other definitions and macros don't need to be changed:
+ *    a) The Coldfire has no floating point registers
+ *    b) The REGISTER_BYTES_OK macro isn't used
+ */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* We need to remove watchpoints when stepping, else we hit them again! */
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(w) cf_stopped_by_watchpoint ()
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+		cf_can_use_watchpoint (type, cnt, ot)
+
+#define target_insert_watchpoint(addr, len, type) cf_insert_watchpoint (addr, len, type)
+#define target_remove_watchpoint(addr, len, type) cf_remove_watchpoint (addr, len, type)
+#define target_insert_hw_breakpoint(addr, shadow) cf_insert_hw_breakpoint (addr, shadow)
+#define target_remove_hw_breakpoint(addr, shadow) cf_remove_hw_breakpoint (addr, shadow)
+#define target_stopped_data_address() cf_stopped_data_address ()
diff -Nru insight-5.3.orig/gdb/configure.tgt insight-5.3/gdb/configure.tgt
--- insight-5.3.orig/gdb/configure.tgt	2002-10-20 14:14:39.000000000 +0200
+++ insight-5.3/gdb/configure.tgt	2003-06-14 03:23:46.000000000 +0200
@@ -140,6 +140,8 @@
 m68000-*-sunos3*)	gdb_target=sun2os3 ;;
 m68000-*-sunos4*)	gdb_target=sun2os4 ;;
 
+m68*-bdm-*)		gdb_target=bdm ;;
+
 # OBSOLETE m68*-apollo*-bsd*)	gdb_target=apollo68b ;;
 m68*-bull-sysv*)	gdb_target=dpx2 ;;
 # OBSOLETE m68*-hp-bsd*)		gdb_target=hp300bsd ;;
diff -Nru insight-5.3.orig/gdb/doc/gdb.texinfo insight-5.3/gdb/doc/gdb.texinfo
--- insight-5.3.orig/gdb/doc/gdb.texinfo	2002-09-27 02:21:38.000000000 +0200
+++ insight-5.3/gdb/doc/gdb.texinfo	2003-06-14 04:11:17.000000000 +0200
@@ -11326,6 +11326,7 @@
 * i960::                        Intel i960
 * M32R/D::                      Mitsubishi M32R/D
 * M68K::                        Motorola M68K
+* Motorola BDM::                Motorola M68K/Coldfire Background Debug Mode
 @c OBSOLETE * M88K::                        Motorola M88K
 * MIPS Embedded::               MIPS Embedded
 * PA::                          HP PA Embedded
@@ -11722,6 +11723,10 @@
 @item target abug @var{dev}
 ABug ROM monitor for M68K.
 
+@kindex target bdm
+Background Debug Mode interface to Motorola 68k/Coldfire machine.
+@xref{Motorola BDM, ,@value{GDBN} and Motorola 68k/Coldfire BDM}.
+
 @kindex target cpu32bug
 @item target cpu32bug @var{dev}
 CPU32BUG monitor, running on a CPU32 (M68K) board.
@@ -11761,6 +11766,101 @@
 
 @end table
 
+
+@node Motorola BDM
+@subsection @value{GDBN} and Motorola BDM
+
+@cindex BDM
+@cindex CPU32
+@cindex Coldfire
+Background Debug Mode (@dfn{BDM}) provides a full set of debug options
+including the ability to:
+@itemize @bullet
+@item Insert breakpoints
+@item Single-step
+@item Display register contents
+@item Display memory contents
+@item Modify register contents
+@item Modify memory contents
+@end itemize
+
+A small interface circuit connects the BDM interface port on the
+target machine to a parallel printer port on the debugging host.
+A target system can be configured and a program downloaded and
+executed with no bootstrap memory on the target machine and no other
+connection between the debugging host and the target machine.
+
+The @code{target} command tells @value{GDBN}
+to debug a program running on a target machine
+@xref{Target Commands, ,Commands for managing targets}.
+For example, the following command tells @value{GDBN} to use a BDM
+interface connected to a ColdFire processor and the @code{LPT0} parallel port:
+@example
+target bdm /dev/bdmcf0
+@end example
+
+Do not attempt to use the parallel port for any other purpose while
+@value{GDBN} is using it to control a BDM target.
+
+Once the BDM target has been selected a few other commands become
+available:
+
+@table @code
+@item bdm_reset
+@kindex bdm_reset
+Reset the target machine and enable BDM operation in the target.
+
+@item bdm_restart
+@kindex bdm_restart
+Reset the target machine and disable BDM operation in the target.
+This command is useful only if the target machine has some kind of
+bootstrap memory installed.
+
+@item bdm_status
+@kindex bdm_status
+Print the status of the target machine and the BDM interface.
+
+@item bdm_setdelay @var{N}
+@kindex bdm_setdelay
+Some BDM interface circuits can not handle high-speed data transfer.
+This command lets you insert a delay between each BDM clock.
+The larger the value of @var{N}, the longer the delay.
+On most machines the default delay of @var{0} should work just fine.
+
+@item bdm_setdebug @var{N}
+@kindex bdm_setdebug
+Setting the level (@var{N}) to a non-zero value turns on
+debugging messages in the BDM support library.
+
+@item bdm_setdriverdebug @var{N}
+@kindex bdm_setdriverdebug
+Setting the level (@var{N}) to a non-zero value turns on
+debugging messages in the BDM device driver.
+
+@end table
+
+The registers which can be displayed and modified are:
+@itemize @bullet
+@item The data registers: @code{$d0}-@code{$d7}
+@item The address registers: @code{$a0}-@code{$a5}, @code{$fp}, @code{$sp}
+@item The program counter: @code{$pc}
+@item The status register: @code{$ps}
+@item The program counter at the beginning of the most recently executed
+instruction: @code{$pcc}
+@item The user stack pointer: @code{$usp}
+@item The supervisor stack pointer: @code{$ssp}
+@item The source function code register: @code{$sfc}
+@item The destinaton function code register: @code{$dfc}
+@item The vector base register: @code{$vbr}
+@item The fault address register: @code{$far}
+@item The BDM temporary register: @code{$atemp}
+@item The module base address register: @code{$mbar}
+@end itemize
+
+Target processor interrupts are disabled during single-step (step, next,
+stepi, nexti) operations.
+
+
 @c OBSOLETE @node M88K
 @c OBSOLETE @subsection M88K
 @c OBSOLETE 
diff -Nru insight-5.3.orig/gdb/remote-m68k-bdm.c insight-5.3/gdb/remote-m68k-bdm.c
--- insight-5.3.orig/gdb/remote-m68k-bdm.c	1970-01-01 01:00:00.000000000 +0100
+++ insight-5.3/gdb/remote-m68k-bdm.c	2003-06-14 03:23:46.000000000 +0200
@@ -0,0 +1,1743 @@
+/*
+ * Motorola Background Debug Mode Target
+ * Copyright (C) 1995  W. Eric Norum
+ * Copyright (C) 1998  Chris Johns ([e-mail])
+ * Copyright (C) 2000  Bryan Feir ([e-mail])
+ *
+ * Based on:
+ *  1. `A Background Debug Mode Driver Package for Motorola's
+ *     16- and 32-Bit Microcontrollers', Scott Howard, Motorola
+ *     Canada, 1993.
+ *  2. `Linux device driver for public domain BDM Interface',
+ *     M. Schraut, Technische Universitaet Muenchen, Lehrstuhl
+ *     fuer Prozessrechner, 1995.
+ *  3. BDM support for gdb by W. Eric Norum
+ *     Saskatchewan Accelerator Laboratory
+ *     University of Saskatchewan
+ *     107 North Road
+ *     Saskatoon, Saskatchewan, CANADA
+ *     S7N 5C6
+ *  4. Coldfire support added by C Johns.
+ *  5. Hardware breakpoint support added by B Feir.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * W. Eric Norum
+ * Saskatchewan Accelerator Laboratory
+ * University of Saskatchewan
+ * 107 North Road
+ * Saskatoon, Saskatchewan, CANADA
+ * S7N 5C6
+ * 
+ * [e-mail]
+ *
+ * Coldfire support by:
+ * Chris Johns
+ * Objective Design Systems
+ * 35 Cairo Street
+ * Cammeray, Sydney, 2062, Australia
+ *
+ * [e-mail]
+ *
+ * Coldfire hardware breakpoint support by:
+ * Bryan Feir
+ * CRESTech (Centre for Research in Earth and Space Technology)
+ * 4850 Keele Street, 1st floor
+ * Toronto, Ontario, CANADA   M6E 3E5
+ *
+ * [e-mail]
+ */
+
+/*
+ * $Revision: 1.1 $    $Date: 2004/03/28 23:13:10 $   $Author: codewiz $
+ */
+
+#include "defs.h"
+#include "gdbcore.h"
+#include "target.h"
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <errno.h>
+#include <signal.h>
+#include <string.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <ctype.h>
+#include <sys/types.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include "gdbcmd.h"
+#include "command.h"
+#include "inferior.h"
+#include "value.h"
+#include "breakpoint.h"
+#include "BDMlib.h"
+
+extern struct target_ops bdm_ops;  /* Forward declaration */
+
+/*
+ * The name of the BDM driver special file
+ */
+static char *dev_name;
+static int cpu_type;
+
+/*
+ * The different register names for the processors.
+ */
+static const char *cpu32plus_reg_names[NUM_REGS] = {
+  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
+  "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
+  "ps", "pc",
+  "pcc", "usp", "ssp", "sfc", "dfc", "atemp", "far",
+  "vbr",
+  NULL, NULL, NULL, NULL,
+  "mbar",
+  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+};
+
+static const char *cpu32_reg_names[NUM_REGS] = {
+  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
+  "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
+  "ps", "pc",
+  "pcc", "usp", "ssp", "sfc", "dfc", NULL, NULL,
+  "vbr",
+  NULL, NULL, NULL, NULL,
+  NULL,
+  NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+};
+
+static const char *cf_reg_names[NUM_REGS] = {
+  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
+  "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
+  "ps", "pc",
+  NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+  "vbr",
+  "cacr", "acr0", "acr1", "rambar",
+  "mbar",
+  "csr", "aatr", "tdr", "pbr", "pbmr", "abhr", "ablr", "dbr", "dbmr",
+};
+
+static const char **bdm_reg_names = cpu32plus_reg_names;
+
+const char *bdm_register_name(int i)
+{
+  if ((i < 0) || (i >= NUM_REGS))
+    return NULL;
+  return bdm_reg_names[i];
+}
+
+static int reg_to_dev_num[] = {
+  BDM_REG_SR, 
+  BDM_REG_RPC,
+  BDM_REG_PCC,
+  BDM_REG_USP,
+  BDM_REG_SSP,
+  BDM_REG_SFC,
+  BDM_REG_DFC,
+  BDM_REG_ATEMP,
+  BDM_REG_FAR,
+  BDM_REG_VBR,
+  BDM_REG_CACR,
+  BDM_REG_ACR0,
+  BDM_REG_ACR1,
+  BDM_REG_RAMBAR,
+  BDM_REG_MBAR,
+  BDM_REG_CSR,
+  BDM_REG_AATR,
+  BDM_REG_TDR,
+  BDM_REG_PBR,
+  BDM_REG_PBMR,
+  BDM_REG_ABHR,
+  BDM_REG_ABLR,
+  BDM_REG_DBR,
+  BDM_REG_DBMR
+ };
+
+/*
+ * The name of the most recently loaded program
+ */
+static char *bdm_prog_loaded;
+
+/*
+ * Do not load the program when creating the target.
+ */
+static int bdm_no_load;
+
+/*
+ * default delay for interface
+ */
+#define  BDM_DEFAULT_DELAY  0
+static int bdm_delay = -1;
+
+/*
+ * does gdb wait or not, only valid for a Coldfire processor
+ */
+static int bdm_gdb_no_wait = 0;
+
+/*
+ * Hold BDM ATEMP register (CPU32 only).
+ */
+static unsigned long atemp;
+static int haveAtemp;
+
+static int hit_watchpoint;
+
+/*
+ * CF BDM Debug hardware version number.
+ */
+
+static unsigned long cf_debug_ver;
+
+/*
+ * Not sure if this is defined somewhere. Cannot see anywhere.
+ */
+extern int (*ui_loop_hook) (int);
+
+/*
+ * Forward declarations
+ */
+static void bdm_load (char *, int);
+
+/*
+ * give target time to come up after reset
+ * time in usec
+ */
+#define  TIME_TO_COME_UP  60000
+
+/*
+ * Downloader routines
+ */
+static int downLoaderReturn;
+static int downLoaderFirst;
+static unsigned long downLoadBaseAddress, downLoadStartAddress;
+static unsigned long downLoadDataCount=0;