📄 lqfun.c
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/********************************************************
龙丘MC9S12(DG128)多功能开发板V4.0
编写:FS
Designed by Chiu Sir
E-mail:chiusir@163.com
软件版本:V1.1
最后更新:2008年12月09日
相关信息参考下列地址：
博客： http://longqiu.21ic.org
淘宝店：http://shop36265907.taobao.com
------------------------------------
Code Warrior 4.6
Target : MC9S12DG128B
Crystal: 16.000Mhz
busclock:16.000MHz
pllclock:32.000MHz
*********************************************************/
#include <mc9s12dg128.h> /* derivative information */
#include "LQprintp.h"
#include "LQ12864.h"
#ifndef NO_ERR
#define NO_ERR 0x00
#define IS_ERR 0x01
#endif
extern U32 CAN0_ID;
extern U32 CAN4_ID;
/*CAN0 Acceptance Code Definitions */
#define ACC_CAN0_EX_ID ConvertID2MSCAN_ID(CAN0_ID)//|(0X00180000)&(0xFFFFFFFE))//确保帧类型为扩展数据帧
#define ACC_CAN0_EX_ID_R0 ((ACC_CAN0_EX_ID&0xFF000000)>>24)
#define ACC_CAN0_EX_ID_R1 ((ACC_CAN0_EX_ID&0x00FF0000)>>16)
#define ACC_CAN0_EX_ID_R2 ((ACC_CAN0_EX_ID&0x0000FF00)>>8)
#define ACC_CAN0_EX_ID_R3 (ACC_CAN0_EX_ID&0x000000FF)
/*CAN0 Mask Code Definitions */
#define MASK_CAN0_EX_ID 0x00070000
#define MASK_CAN0_EX_ID_R0 ((MASK_CAN0_EX_ID&0xFF000000)>>24)
#define MASK_CAN0_EX_ID_R1 ((MASK_CAN0_EX_ID&0x00FF0000)>>16)
#define MASK_CAN0_EX_ID_R2 ((MASK_CAN0_EX_ID&0x0000FF00)>>8)
#define MASK_CAN0_EX_ID_R3 (MASK_CAN0_EX_ID&0x000000FF)
/*CAN4 Acceptance Code Definitions */
#define ACC_CAN4_EX_ID ConvertID2MSCAN_ID(CAN4_ID)//|(0X00180000)&(0xFFFFFFFE))
#define ACC_CAN4_EX_ID_R0 ((ACC_CAN4_EX_ID&0xFF000000)>>24)
#define ACC_CAN4_EX_ID_R1 ((ACC_CAN4_EX_ID&0x00FF0000)>>16)
#define ACC_CAN4_EX_ID_R2 ((ACC_CAN4_EX_ID&0x0000FF00)>>8)
#define ACC_CAN4_EX_ID_R3 (ACC_CAN4_EX_ID&0x000000FF)
/*CAN4 Mask Code Definitions */
#define MASK_CAN4_EX_ID 0x00070000
#define MASK_CAN4_EX_ID_R0 ((MASK_CAN4_EX_ID&0xFF000000)>>24)
#define MASK_CAN4_EX_ID_R1 ((MASK_CAN4_EX_ID&0x00FF0000)>>16)
#define MASK_CAN4_EX_ID_R2 ((MASK_CAN4_EX_ID&0x0000FF00)>>8)
#define MASK_CAN4_EX_ID_R3 (MASK_CAN4_EX_ID&0x000000FF)
#pragma CODE_SEG DEFAULT
void delayms(int ms)
{
int ii,jj;
if (ms<1) ms=1;
for(ii=0;ii<ms;ii++)
for(jj=0;jj<1335;jj++); //16MHz--1ms
//for(jj=0;jj<4006;jj++); //48MHz--1ms
//for(jj=0;jj<5341;jj++); //64MHz--1ms
}
U32 ConvertID2MSCAN_ID(U32 OID)
{
U32 tmID=0;
tmID=OID<<1;
tmID=((tmID&0xffe00000)<<2)|(tmID&0x000fffff|0x00180000);
return tmID;
}
void SCI_Init(void)
{
SCI0CR2=0x2c; //enable Receive Full Interrupt,RX enable,Tx enable
SCI0BDH=0x00; //busclk 8MHz,19200bps,SCI0BDL=0x1a
SCI0BDL=0x34; //SCI0BDL=busclk/(16*SCI0BDL)
}
void InitPorts(void)
{
RDRT=0xff; // reduce the power of T port
RDRIV=0x93; // reduce the power of
DDRB=0xff; // set port B bit0 as output
PORTB=0X00;
DDRT_DDRT4=1; // set portT bit 4 as output
DDRP_DDRP3=1; // reduce the power of port P3
RDRP_RDRP3=1; // set portP bit 3 as output
}
// ----------------------initial CAN0rig--------------------
void InitCAN0(void)
{
CAN0CTL0 = 0x01; /* Enter Initialization Mode
*
* 0b00000001
* ||||||||__ Enter Initialization Mode
* |||||||___ Sleep Mode Request bit
* ||||||____ Wake-Up disabled
* |||||_____ Time stamping disabled
* ||||______ Synchronized Status
* |||_______ CAN not affected by Wait
* ||________ Receiver Active Status bit
* |_________ Received Frame Flag bit
*/
while(CAN0CTL1_INITAK!=1); // Wait for Initialization Mode acknowledge INITRQ bit = 1
CAN0CTL1 = 0x80; /* Enable MSCAN module and not LoopBack Mode
*
* 0b10100000
* ||||||||__ Initialization Mode Acknowledge
* |||||||___ Sleep Mode Acknowledge
* ||||||____ Wake-up low-pass filter disabled
* |||||_____ Unimplemented
* ||||______ Listen Only Mode disabled
* |||_______ not Loop Back Mode enabled
* ||________ Ext Osc/Xtal as Clock Source
* |_________ MSCAN Module enabled
*/
CAN0BTR0 = 0x43; /* Synch Jump = 2 Tq clock Cycles
*
* 0b01000011
* ||||||||__
* |||||||___\
* ||||||____ |
* |||||_____ |_ CAN Clock Prescaler = 4
* ||||______ |
* |||_______/
* ||________
* |_________>- SJW = 2
*/
CAN0BTR1 = 0x14; /* Set Number of samples per bit, TSEG1 and TSEG2
* bit rate=Fclk/pres v/(1+TSEG1+TSEG2)=16M/4/(1+2+5)=500kbps
* 0b00010100
* ||||||||__
* |||||||___\
* ||||||____ |- TSEG1 = 5
* |||||_____/
* ||||______
* |||_______\_ TSEG2 = 2
* ||________/
* |_________ One sample per bit
*/
CAN0IDAC = 0x00; /* Set two 32-bit Filters
*
* 0b00000000
* ||||||||__
* |||||||___\_ Filter Hit Indicator
* ||||||____/
* |||||_____ Unimplemented
* ||||______
* |||_______>- two 32-bit Acceptance Filters
* ||________
* |_________>- Unimplemented
*/
/* note Acceptance Filters neither Acceptance Filter is accorded with,message in receivebuffer will pass */
CAN0IDAR0 = ACC_CAN0_EX_ID_R0; // |\ 32 bit Filter 0
CAN0IDAR1 = ACC_CAN0_EX_ID_R1; // | \__ Accepts Extended Data Frame Msg
CAN0IDAR2 = ACC_CAN0_EX_ID_R2; // | / with ID: CAN0_ID
CAN0IDAR3 = ACC_CAN0_EX_ID_R3; // |/
CAN0IDAR4 = ACC_CAN0_EX_ID_R0; // |\ 32 bit Filter 0
CAN0IDAR5 = ACC_CAN0_EX_ID_R1; // | \__ Accepts Extended Data Frame Msg
CAN0IDAR6 = ACC_CAN0_EX_ID_R2; // | / with ID: CAN0_ID
CAN0IDAR7 = ACC_CAN0_EX_ID_R3; // |/
CAN0IDMR0 = MASK_CAN0_EX_ID_R0;
CAN0IDMR1 = MASK_CAN0_EX_ID_R1;
CAN0IDMR2 = MASK_CAN0_EX_ID_R2;
CAN0IDMR3 = MASK_CAN0_EX_ID_R3;
CAN0IDMR4 = MASK_CAN0_EX_ID_R0;
CAN0IDMR5 = MASK_CAN0_EX_ID_R1;
CAN0IDMR6 = MASK_CAN0_EX_ID_R2;
CAN0IDMR7 = MASK_CAN0_EX_ID_R3;
CAN0CTL0 = 0x00; /* Exit Initialization Mode Request */
while ((CAN0CTL1&0x01)!=0); // 等待，直到MSCAN正常运行
while(!(CAN0CTL0&0x10)); // 等待，直到MSCAN与CAN总线同步
CAN0RFLG = 0xC3; /* Reset Receiver Flags
*
* 0b11000011
* ||||||||__ Receive Buffer Full Flag
* |||||||___ Overrun Interrupt Flag
* ||||||____
* |||||_____>- Transmitter Status Bits
* ||||______
* |||_______>- Receiver Status Bits
* ||________ CAN Status Change Interrupt Flag
* |_________ Wake-Up Interrupt Flag
*/
CAN0RIER = 0x01; /* Enable Receive Buffer Full Interrupt
*
* 0b00000001
* ||||||||__ Receive Buffer Full Int enabled
* |||||||___ Overrun Int disabled
* ||||||____
* |||||_____>- Tx Status Change disabled
* ||||______
* |||_______>- Rx Status Change disabled
* ||________ Status Change Int disabled
* |_________ Wake-Up Int disabled
*/
}
// -------------------------------sendframe-----------------------
int CAN0SendFrame(unsigned long id, unsigned char priority, unsigned char length, unsigned char *txdata )
{
unsigned char index; // number for read message
unsigned char tbsel = 0; // symbol for CAN0TBSEL
if (!CAN0TFLG) return IS_ERR; /* Is Transmit Buffer full?? */
CAN0TBSEL = CAN0TFLG; /* Select lowest empty buffer */
tbsel = CAN0TBSEL; /* Backup selected buffer */
/* Load Id to IDR Registers */
*((unsigned long *) ((unsigned long)(&CAN0TXIDR0)))= id;
if(length>8) length=8;
for (index=0;index<length;index++)
{
*(&CAN0TXDSR0 + index) = txdata[index]; // Load data to Tx buffer Data Segment Registers(ONLY 8 BYTES?)
}
CAN0TXDLR = length; /* Set Data Length Code */
CAN0TXTBPR = priority; /* Set Priority */
CAN0TFLG = tbsel; /* Start transmission */
//printp("\nCAN4TXIDR0~CAN4TXIDR3:%04x,%04x,%04x,%04x",CAN4TXIDR0,CAN4TXIDR1,CAN4TXIDR2,CAN4TXIDR3) ;
while ((CAN0TFLG & tbsel) != tbsel); // Wait for Transmission completion
//putstr("\nCAN0 Sending is successful!");
return NO_ERR;
}
void InitCAN4(void)
{
CAN4CTL0 = 0x01;
while(CAN4CTL1_INITAK!=1); // Wait for Initialization Mode acknowledge INITRQ bit = 1
CAN4CTL1 = 0x80;
CAN4BTR0 = 0x43;
CAN4BTR1 = 0x14;
CAN4IDAC = 0x00; // two 32-bit Acceptance Filters
/* note Acceptance Filters neither Acceptance Filter is accorded with,message in receivebuffer will pass */
CAN4IDAR0 = ACC_CAN4_EX_ID_R0; // |\ 32 bit Filter 0
CAN4IDAR1 = ACC_CAN4_EX_ID_R1; // | \__ Accepts Extended Data Frame Msg
CAN4IDAR2 = ACC_CAN4_EX_ID_R2; // | / with ID: CAN0_ID
CAN4IDAR3 = ACC_CAN4_EX_ID_R3; // |/
CAN4IDAR4 = ACC_CAN4_EX_ID_R0; // |\ 32 bit Filter 0
CAN4IDAR5 = ACC_CAN4_EX_ID_R1; // | \__ Accepts Extended Data Frame Msg
CAN4IDAR6 = ACC_CAN4_EX_ID_R2; // | / with ID: CAN0_ID
CAN4IDAR7 = ACC_CAN4_EX_ID_R3; // |/
CAN4IDMR0 = MASK_CAN4_EX_ID_R0;
CAN4IDMR1 = MASK_CAN4_EX_ID_R1;
CAN4IDMR2 = MASK_CAN4_EX_ID_R2;
CAN4IDMR3 = MASK_CAN4_EX_ID_R3;
CAN4IDMR4 = MASK_CAN4_EX_ID_R0;
CAN4IDMR5 = MASK_CAN4_EX_ID_R1;
CAN4IDMR6 = MASK_CAN4_EX_ID_R2;
CAN4IDMR7 = MASK_CAN4_EX_ID_R3;
CAN4CTL0 = 0x00; /* Exit Initialization Mode Request */
while ((CAN4CTL1&0x01)!=0); // 等待，直到MSCAN正常运行
while(!(CAN4CTL0&0x10)); // 等待，直到MSCAN与CAN总线同步
CAN4RFLG = 0xC3;
CAN4RIER = 0x01;
}
// -------------------------------sendframe-----------------------
int CAN4SendFrame(unsigned long id, unsigned char priority, unsigned char length, unsigned char *txdata )
{
unsigned char index; // number for read message
unsigned char tbsel = 0; // symbol for CAN4TBSEL
if (!CAN4TFLG) return IS_ERR; /* Is Transmit Buffer full?? */
CAN4TBSEL = CAN4TFLG; /* Select lowest empty buffer */
tbsel = CAN4TBSEL; /* Backup selected buffer */
/* Load Id to IDR Registers */
*((unsigned long *) ((unsigned long)(&CAN4TXIDR0)))= id;//接收方
if(length>8) length=8;
for (index=0;index<length;index++)
{
*(&CAN4TXDSR0 + index) = txdata[index]; // Load data to Tx buffer Data Segment Registers(ONLY 8 BYTES?)
}
CAN4TXDLR = length; /* Set Data Length Code */
CAN4TXTBPR = priority; /* Set Priority */
CAN4TFLG = tbsel; /* Start transmission */
//printp("\nCAN4TXIDR0~CAN4TXIDR3:%04x,%04x,%04x,%04x",CAN4TXIDR0,CAN4TXIDR1,CAN4TXIDR2,CAN4TXIDR3) ;
while ((CAN4TFLG & tbsel) != tbsel); // Wait for Transmission completion
//putstr("\nCAN4 Sending is successful!");
return NO_ERR;
}
// PLL初始化子程序 BUS Clock=8M
void setbusclock(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR=1;
REFDV=1; //pllclock=2*osc*(1+SYNR)/(1+REFDV)=64MHz;
_asm(nop); //BUS CLOCK=32M
_asm(nop);
while(!(CRGFLG_LOCK==1)); //when pll is steady ,then use it;
CLKSEL_PLLSEL =1; //engage PLL to system;
}
void Init_Dev(void)
{
setbusclock();
InitPorts();
SCI_Init();
InitCAN0();
InitCAN4();
LCD_Init();
}
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