c5410.h

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#ifndef _C5410_H
#define _C5410_H 1

#define DMPREC_ADDR             0x0054
#define DMSBAR_ADDR             0x0055
#define DMSBAI_ADDR             0x0056
#define DMSBAN_ADDR             0x0057
#define DMSRC0_SUBADDR          0x0000
#define DMDST0_SUBADDR          0x0001
#define DMCTR0_SUBADDR          0x0002
#define DMSFC0_SUBADDR          0x0003
#define DMMCR0_SUBADDR          0x0004
#define DMSRC1_SUBADDR          0x0005
#define DMDST1_SUBADDR          0x0006
#define DMCTR1_SUBADDR          0x0007
#define DMSFC1_SUBADDR          0x0008
#define DMMCR1_SUBADDR          0x0009
#define DMSRC2_SUBADDR          0x000a
#define DMDST2_SUBADDR          0x000b
#define DMCTR2_SUBADDR          0x000c
#define DMSFC2_SUBADDR          0x000d
#define DMMCR2_SUBADDR          0x000e
#define DMSRC3_SUBADDR          0x000f
#define DMDST3_SUBADDR          0x0010
#define DMCTR3_SUBADDR          0x0011
#define DMSFC3_SUBADDR          0x0012
#define DMMCR3_SUBADDR          0x0013
#define DMSRC4_SUBADDR          0x0014
#define DMDST4_SUBADDR          0x0015
#define DMCTR4_SUBADDR          0x0016
#define DMSFC4_SUBADDR          0x0017
#define DMMCR4_SUBADDR          0x0018
#define DMSRC5_SUBADDR          0x0019
#define DMDST5_SUBADDR          0x001a
#define DMCTR5_SUBADDR          0x001b
#define DMSFC5_SUBADDR          0x001c
#define DMMCR5_SUBADDR          0x001d
#define DMSRCP_SUBADDR          0x001e
#define DMDSTP_SUBADDR          0x001f
#define DMIDX0_SUBADDR          0x0020
#define DMIDX1_SUBADDR          0x0021
#define DMFRI0_SUBADDR          0x0022
#define DMFRI1_SUBADDR          0x0023
#define DMGSA_SUBADDR           0x0024
#define DMGDA_SUBADDR           0x0025
#define DMGCR_SUBADDR           0x0026
#define DMGFR_SUBADDR           0x0027

#define DMPREC                  *(volatile unsigned int *)(DMPREC_ADDR)
#define DMSBAR                  *(volatile unsigned int *)(DMSBAR_ADDR)
#define DMSBAI                  *(volatile unsigned int *)(DMSBAI_ADDR)
#define DMSBAN                  *(volatile unsigned int *)(DMSBAN_ADDR)

#define HPIC_ADDR       0x002c
#define HPIC            *(volatile unsigned int *)(HPIC_ADDR)

#define IMR_ADDR        0x0000
#define IMR             *(volatile unsigned int *)(IMR_ADDR)
#define IFR_ADDR        0x0001
#define IFR             *(volatile unsigned int *)(IFR_ADDR)
#define PRD_ADDR        0x0025
#define PRD             *(volatile unsigned int *)(PRD_ADDR)
#define TCR_ADDR        0x0026
#define TCR             *(volatile unsigned int *)(TCR_ADDR)


#define BXINT0		0x0020
#define EXT3_INT        0x0100
#define HPI_INT         0x0200
#define DMA2_INT        0x0400
#define DMA3_INT        0x0800

#define FIELD_VAL(bit,length,val)       (MASK_FIELD(bit,length) & (val<<bit))
#define BIT_VAL(bit,val)                ((0x1&val)<<bit)

#define SWWSR_ADDR      0x0028
#define SWWSR           *(volatile unsigned int *)(SWWSR_ADDR)
#define BSCR_ADDR       0x0029
#define BSCR            *(volatile unsigned int *)(BSCR_ADDR)
#define SWCR_ADDR       0x002b
#define SWCR            *(volatile unsigned int *)(SWCR_ADDR)

#define PLL_REG   0x0058

#define PLLMUL	  0xF000
#define PLLDIV	  0x0800
#define PLLCNT	  0x07F8
#define PLLOFF	  0x0004
#define PLLNDIV   0x0002
#define PLLSTAT   0x0001

#define PLL_DIV_INIT         0x6004
#define PLL_LOCK_INIT_X1     0x07fb
#define PLL_LOCK_INIT_X2     0x17fb
#define PLL_LOCK_INIT_X3     0x27fb
#define PLL_LOCK_INIT_X4     0x37fb
#define PLL_LOCK_INIT_X5     0x47fb
#define PLL_LOCK_INIT_X6     0x57fb
#define PLL_LOCK_INIT_X7     0x67fb
#define PLL_LOCK_INIT_X8     0x77fb
#define PLL_LOCK_INIT_X9     0x87fb
#define PLL_LOCK_INIT_X10    0x97fb
#define PLL_LOCK_INIT_X11    0xa7fb
#define PLL_LOCK_INIT_X12    0xb7fb
#define PLL_LOCK_INIT_X13    0xc7fb
#define PLL_LOCK_INIT_X14    0xd7fb
#define PLL_LOCK_INIT_X15    0xe7fb

ioport unsigned port80;
ioport unsigned port81;
ioport unsigned port82;

#define CPLD_REG0 port80
#define CPLD_REG1 port81
#define CPLD_REG2 port82

#endif